#
# NXP i.MX7ULP: Cortex-A7 + Cortex-M4
#

if { [info exists CHIPNAME] } {
    set _CHIPNAME $CHIPNAME
} else {
    set _CHIPNAME imx7ulp
}

# CoreSight Debug Access Port
if { [info exists DAP_TAPID] } {
    set _DAP_TAPID $DAP_TAPID
} else {
    # TAPID is from FreeScale!
    set _DAP_TAPID 0x188e101d
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
        -expected-id $_DAP_TAPID

dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

# Cortex-A7
target create $_CHIPNAME.cpu_a7 cortex_a -dap $_CHIPNAME.dap \
        -coreid 0 -dbgbase 0x80030000

# Cortex-M4
# Boots by default so don't defer examination
target create $_CHIPNAME.cpu_m4 cortex_m -dap $_CHIPNAME.dap -ap-num 3

# AHB main soc bus
target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0

# Default is Cortex-A7
targets $_CHIPNAME.cpu_a7
