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armv7m.h 5.1 KiB

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  1. /***************************************************************************
  2. * Copyright (C) 2005 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * Copyright (C) 2006 by Magnus Lundin *
  6. * lundin@mlu.mine.nu *
  7. * *
  8. * Copyright (C) 2008 by Spencer Oliver *
  9. * spen@spen-soft.co.uk *
  10. * *
  11. * This program is free software; you can redistribute it and/or modify *
  12. * it under the terms of the GNU General Public License as published by *
  13. * the Free Software Foundation; either version 2 of the License, or *
  14. * (at your option) any later version. *
  15. * *
  16. * This program is distributed in the hope that it will be useful, *
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  19. * GNU General Public License for more details. *
  20. * *
  21. * You should have received a copy of the GNU General Public License *
  22. * along with this program; if not, write to the *
  23. * Free Software Foundation, Inc., *
  24. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  25. ***************************************************************************/
  26. #ifndef ARMV7M_COMMON_H
  27. #define ARMV7M_COMMON_H
  28. #include "arm_adi_v5.h"
  29. #include "arm.h"
  30. /* define for enabling armv7 gdb workarounds */
  31. #if 1
  32. #define ARMV7_GDB_HACKS
  33. #endif
  34. #ifdef ARMV7_GDB_HACKS
  35. extern uint8_t armv7m_gdb_dummy_cpsr_value[];
  36. extern struct reg armv7m_gdb_dummy_cpsr_reg;
  37. #endif
  38. enum armv7m_mode
  39. {
  40. ARMV7M_MODE_THREAD = 0,
  41. ARMV7M_MODE_USER_THREAD = 1,
  42. ARMV7M_MODE_HANDLER = 2,
  43. ARMV7M_MODE_ANY = -1
  44. };
  45. extern char *armv7m_mode_strings[];
  46. enum armv7m_regtype
  47. {
  48. ARMV7M_REGISTER_CORE_GP,
  49. ARMV7M_REGISTER_CORE_SP,
  50. ARMV7M_REGISTER_MEMMAP
  51. };
  52. char *armv7m_exception_string(int number);
  53. /* offsets into armv7m core register cache */
  54. enum
  55. {
  56. /* for convenience, the first set of indices match
  57. * the Cortex-M3 DCRSR selectors
  58. */
  59. ARMV7M_R0,
  60. ARMV7M_R1,
  61. ARMV7M_R2,
  62. ARMV7M_R3,
  63. ARMV7M_R4,
  64. ARMV7M_R5,
  65. ARMV7M_R6,
  66. ARMV7M_R7,
  67. ARMV7M_R8,
  68. ARMV7M_R9,
  69. ARMV7M_R10,
  70. ARMV7M_R11,
  71. ARMV7M_R12,
  72. ARMV7M_R13,
  73. ARMV7M_R14,
  74. ARMV7M_PC = 15,
  75. ARMV7M_xPSR = 16,
  76. ARMV7M_MSP,
  77. ARMV7M_PSP,
  78. /* this next set of indices is arbitrary */
  79. ARMV7M_PRIMASK,
  80. ARMV7M_BASEPRI,
  81. ARMV7M_FAULTMASK,
  82. ARMV7M_CONTROL,
  83. };
  84. #define ARMV7M_COMMON_MAGIC 0x2A452A45
  85. struct armv7m_common
  86. {
  87. int common_magic;
  88. struct reg_cache *core_cache;
  89. enum armv7m_mode core_mode;
  90. int exception_number;
  91. struct swjdp_common swjdp_info;
  92. /* Direct processor core register read and writes */
  93. int (*load_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t *value);
  94. int (*store_core_reg_u32)(struct target *target, enum armv7m_regtype type, uint32_t num, uint32_t value);
  95. /* register cache to processor synchronization */
  96. int (*read_core_reg)(struct target *target, unsigned num);
  97. int (*write_core_reg)(struct target *target, unsigned num);
  98. int (*examine_debug_reason)(struct target *target);
  99. void (*post_debug_entry)(struct target *target);
  100. void (*pre_restore_context)(struct target *target);
  101. void (*post_restore_context)(struct target *target);
  102. };
  103. static inline struct armv7m_common *
  104. target_to_armv7m(struct target *target)
  105. {
  106. return target->arch_info;
  107. }
  108. struct armv7m_algorithm
  109. {
  110. int common_magic;
  111. enum armv7m_mode core_mode;
  112. };
  113. struct armv7m_core_reg
  114. {
  115. uint32_t num;
  116. enum armv7m_regtype type;
  117. struct target *target;
  118. struct armv7m_common *armv7m_common;
  119. };
  120. struct reg_cache *armv7m_build_reg_cache(struct target *target);
  121. enum armv7m_mode armv7m_number_to_mode(int number);
  122. int armv7m_mode_to_number(enum armv7m_mode mode);
  123. int armv7m_arch_state(struct target *target);
  124. int armv7m_get_gdb_reg_list(struct target *target,
  125. struct reg **reg_list[], int *reg_list_size);
  126. int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
  127. int armv7m_run_algorithm(struct target *target,
  128. int num_mem_params, struct mem_param *mem_params,
  129. int num_reg_params, struct reg_param *reg_params,
  130. uint32_t entry_point, uint32_t exit_point,
  131. int timeout_ms, void *arch_info);
  132. int armv7m_invalidate_core_regs(struct target *target);
  133. int armv7m_restore_context(struct target *target);
  134. int armv7m_checksum_memory(struct target *target,
  135. uint32_t address, uint32_t count, uint32_t* checksum);
  136. int armv7m_blank_check_memory(struct target *target,
  137. uint32_t address, uint32_t count, uint32_t* blank);
  138. extern const struct command_registration armv7m_command_handlers[];
  139. #endif /* ARMV7M_H */