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flash/nor/at91sam4: add SAM4E16 support

Change-Id: I7ab4750073c9d34812b690996eef76fccf70c627
Signed-off-by: Marco Cruz <marco.caratuva@gmail.com>
Reviewed-on: http://openocd.zylin.com/2157
Reviewed-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
tags/v0.9.0-rc1
Marco Cruz 10 years ago
committed by Spencer Oliver
parent
commit
02f5abddb9
1 changed files with 38 additions and 1 deletions
  1. +38
    -1
      src/flash/nor/at91sam4.c

+ 38
- 1
src/flash/nor/at91sam4.c View File

@@ -67,7 +67,7 @@

#define REG_NAME_WIDTH (12)

/* at91sam4s series (has always one flash bank)*/
/* at91sam4s/at91sam4e series (has always one flash bank)*/
#define FLASH_BANK_BASE_S 0x00400000

/* at91sam4sd series (two one flash banks), first bank address */
@@ -260,6 +260,42 @@ static struct sam4_chip *get_current_sam4(struct command_context *cmd_ctx)

/* these are used to *initialize* the "pChip->details" structure. */
static const struct sam4_chip_details all_sam4_details[] = {

/* Start at91sam4e* series */
/*atsam4e16e - LQFP144/LFBGA144*/
{
.chipid_cidr = 0xA3CC0CE0,
.name = "at91sam4e16e",
.total_flash_size = 1024 * 1024,
.total_sram_size = 128 * 1024,
.n_gpnvms = 2,
.n_banks = 1,
{
/* .bank[0] = {*/
{
.probed = 0,
.pChip = NULL,
.pBank = NULL,
.bank_number = 0,
.base_address = FLASH_BANK_BASE_S,
.controller_address = 0x400e0a00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,
.size_bytes = 1024 * 1024,
.nsectors = 128,
.sector_size = 8192,
.page_size = 512,
},
/* .bank[1] = {*/
{
.present = 0,
.probed = 0,
.bank_number = 1,

},
},
},

/* Start at91sam4s* series */
/*atsam4s16c - LQFP100/BGA100*/
{
@@ -1111,6 +1147,7 @@ static const struct archnames { unsigned value; const char *name; } archnames[]
{ 0x37, "CAP7 Series" },
{ 0x39, "CAP9 Series" },
{ 0x3B, "CAP11 Series" },
{ 0x3C, "ATSAM4E" },
{ 0x40, "AT91x40 Series" },
{ 0x42, "AT91x42 Series" },
{ 0x43, "SAMG51 Series"


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