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@@ -24,6 +24,11 @@ |
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#include "dcc_stdio.h" |
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#include "dcc_stdio.h" |
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#define TARGET_REQ_TRACEMSG 0x00 |
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#define TARGET_REQ_DEBUGMSG_ASCII 0x01 |
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#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8)) |
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#define TARGET_REQ_DEBUGCHAR 0x02 |
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#if defined(__ARM_ARCH_7M__) |
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#if defined(__ARM_ARCH_7M__) |
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/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel |
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/* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel |
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@@ -34,11 +39,6 @@ |
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#define NVIC_DBG_DATA_R (*((volatile unsigned short *)0xE000EDF8)) |
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#define NVIC_DBG_DATA_R (*((volatile unsigned short *)0xE000EDF8)) |
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#define TARGET_REQ_TRACEMSG 0x00 |
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#define TARGET_REQ_DEBUGMSG_ASCII 0x01 |
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#define TARGET_REQ_DEBUGMSG_HEXMSG(size) (0x01 | ((size & 0xff) << 8)) |
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#define TARGET_REQ_DEBUGCHAR 0x02 |
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#define BUSY 1 |
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#define BUSY 1 |
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void dbg_write(unsigned long dcc_data) |
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void dbg_write(unsigned long dcc_data) |
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@@ -56,7 +56,7 @@ void dbg_write(unsigned long dcc_data) |
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} |
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} |
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} |
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} |
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#elif defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5TE__) |
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#elif defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5TE__) || defined(__ARM_ARCH_5T__) |
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void dbg_write(unsigned long dcc_data) |
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void dbg_write(unsigned long dcc_data) |
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{ |
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{ |
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