target: Remove "-variant" argument

Remove this underutilized feature. Despite the fact that a lot of configs
specifies a arbitrary "variant", only the xscale target actually defines
any.

In the case of xscale, the use of -variant is dubious since

1) it's used as a redundant irlen specifier,
2) it carries a comment that it doesn't really need it and
3) only two xscale configs even specify it.

If there's a future target that needs a variant set, a target specific
option could be added when needed.

Change-Id: I1ba25a946f0d80872cbd96ddcc48f92695c4ae20
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/2283
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

doc/openocd.texi

@@ -4169,10 +4169,9 @@ the given target with the given @var{name}; this is
 only relevant on boards which have more than one target.
 @end deffn
 
-@section Target CPU Types and Variants
+@section Target CPU Types
 @cindex target type
 @cindex CPU type
-@cindex CPU variant
 
 Each target has a @dfn{CPU type}, as shown in the output of
 the @command{targets} command. You need to specify that type
@@ -4185,20 +4184,13 @@ what core-specific commands may be available
 (@pxref{Architecture and Core Commands}),
 and more.
 
-For some CPU types, OpenOCD also defines @dfn{variants} which
-indicate differences that affect their handling.
-For example, a particular implementation bug might need to be
-worked around in some chip versions.
-
 It's easy to see what target types are supported,
 since there's a command to list them.
-However, there is currently no way to list what target variants
-are supported (other than by reading the OpenOCD source code).
 
 @anchor{targettypes}
 @deffn Command {target types}
 Lists all supported target types.
-At this writing, the supported CPU types and variants are:
+At this writing, the supported CPU types are:
 
 @itemize @bullet
 @item @code{arm11} -- this is a generation of ARMv6 cores
@@ -4218,17 +4210,9 @@ compact Thumb2 instruction set.
 (Support for this is still incomplete.)
 @item @code{fa526} -- resembles arm920 (w/o Thumb)
 @item @code{feroceon} -- resembles arm926
-@item @code{mips_m4k} -- a MIPS core. This supports one variant:
+@item @code{mips_m4k} -- a MIPS core
 @item @code{xscale} -- this is actually an architecture,
 not a CPU type. It is based on the ARMv5 architecture.
-There are several variants defined:
-@itemize @minus
-@item @code{ixp42x}, @code{ixp45x}, @code{ixp46x},
-@code{pxa27x} ... instruction register length is 7 bits
-@item @code{pxa250}, @code{pxa255},
-@code{pxa26x} ... instruction register length is 5 bits
-@item @code{pxa3xx} ... instruction register length is 11 bits
-@end itemize
 @item @code{openrisc} -- this is an OpenRISC 1000 core.
 The current implementation supports three JTAG TAP cores:
 @itemize @minus
@@ -4329,7 +4313,6 @@ and in other places the target needs to be identified.
 @item @var{configparams} ... all parameters accepted by
 @command{$target_name configure} are permitted.
 If the target is big-endian, set it here with @code{-endian big}.
-If the variant matters, set it here with @code{-variant}.
 
 You @emph{must} set the @code{-chain-position @var{dotted.name}} here.
 @end itemize
@@ -4343,7 +4326,7 @@ using the @command{$target_name cget} command.
 
 @emph{Warning:} changing some of these after setup is dangerous.
 For example, moving a target from one TAP to another;
-and changing its endianness or variant.
+and changing its endianness.
 
 @itemize @bullet
 
@@ -4360,9 +4343,6 @@ Calling this twice with two different event names assigns
 two different handlers, but calling it twice with the
 same event name assigns only one handler.
 
-@item @code{-variant} @var{name} -- specifies a variant of the target,
-which OpenOCD needs to know about.
-
 @item @code{-work-area-backup} (@option{0}|@option{1}) -- says
 whether the work area gets backed up; by default,
 @emph{it is not backed up.}

src/target/target.c

@@ -4115,7 +4115,6 @@ enum target_cfg_param {
 	TCFG_WORK_AREA_SIZE,
 	TCFG_WORK_AREA_BACKUP,
 	TCFG_ENDIAN,
-	TCFG_VARIANT,
 	TCFG_COREID,
 	TCFG_CHAIN_POSITION,
 	TCFG_DBGBASE,
@@ -4130,7 +4129,6 @@ static Jim_Nvp nvp_config_opts[] = {
 	{ .name = "-work-area-size",   .value = TCFG_WORK_AREA_SIZE },
 	{ .name = "-work-area-backup", .value = TCFG_WORK_AREA_BACKUP },
 	{ .name = "-endian" ,          .value = TCFG_ENDIAN },
-	{ .name = "-variant",          .value = TCFG_VARIANT },
 	{ .name = "-coreid",           .value = TCFG_COREID },
 	{ .name = "-chain-position",   .value = TCFG_CHAIN_POSITION },
 	{ .name = "-dbgbase",          .value = TCFG_DBGBASE },
@@ -4143,7 +4141,6 @@ static int target_configure(Jim_GetOptInfo *goi, struct target *target)
 	Jim_Nvp *n;
 	Jim_Obj *o;
 	jim_wide w;
-	char *cp;
 	int e;
 
 	/* parse config or cget options ... */
@@ -4352,27 +4349,6 @@ no_params:
 			/* loop for more */
 			break;
 
-		case TCFG_VARIANT:
-			if (goi->isconfigure) {
-				if (goi->argc < 1) {
-					Jim_SetResultFormatted(goi->interp,
-										   "%s ?STRING?",
-										   n->name);
-					return JIM_ERR;
-				}
-				e = Jim_GetOpt_String(goi, &cp, NULL);
-				if (e != JIM_OK)
-					return e;
-				free(target->variant);
-				target->variant = strdup(cp);
-			} else {
-				if (goi->argc != 0)
-					goto no_params;
-			}
-			Jim_SetResultString(goi->interp, target->variant, -1);
-			/* loop for more */
-			break;
-
 		case TCFG_COREID:
 			if (goi->isconfigure) {
 				e = Jim_GetOpt_Wide(goi, &w);
@@ -5185,10 +5161,6 @@ static int target_create(Jim_GetOptInfo *goi)
 		target->endianness = TARGET_LITTLE_ENDIAN;
 	}
 
-	/* incase variant is not set */
-	if (!target->variant)
-		target->variant = strdup("");
-
 	cp = Jim_GetString(new_cmd, NULL);
 	target->cmd_name = strdup(cp);
 

src/target/target.h

@@ -129,7 +129,6 @@ struct target {
 	int target_number;					/* DO NOT USE!  field to be removed in 2010 */
 	struct jtag_tap *tap;				/* where on the jtag chain is this */
 	int32_t coreid;						/* which device on the TAP? */
-	char *variant;						/* what variant of this chip is it? */
 
 	/**
 	 * Indicates whether this target has been examined.

src/target/xscale.c

@@ -2905,7 +2905,7 @@ static int xscale_init_target(struct command_context *cmd_ctx,
 }
 
 static int xscale_init_arch_info(struct target *target,
-	struct xscale_common *xscale, struct jtag_tap *tap, const char *variant)
+	struct xscale_common *xscale, struct jtag_tap *tap)
 {
 	struct arm *arm;
 	uint32_t high_reset_branch, low_reset_branch;
@@ -2916,33 +2916,7 @@ static int xscale_init_arch_info(struct target *target,
 	/* store architecture specfic data */
 	xscale->common_magic = XSCALE_COMMON_MAGIC;
 
-	/* we don't really *need* a variant param ... */
-	if (variant) {
-		int ir_length = 0;
-
-		if (strcmp(variant, "pxa250") == 0
-			|| strcmp(variant, "pxa255") == 0
-			|| strcmp(variant, "pxa26x") == 0)
-			ir_length = 5;
-		else if (strcmp(variant, "pxa27x") == 0
-			|| strcmp(variant, "ixp42x") == 0
-			|| strcmp(variant, "ixp45x") == 0
-			|| strcmp(variant, "ixp46x") == 0)
-			ir_length = 7;
-		else if (strcmp(variant, "pxa3xx") == 0)
-			ir_length = 11;
-		else
-			LOG_WARNING("%s: unrecognized variant %s",
-				tap->dotted_name, variant);
-
-		if (ir_length && ir_length != tap->ir_length) {
-			LOG_WARNING("%s: IR length for %s is %d; fixing",
-				tap->dotted_name, variant, ir_length);
-			tap->ir_length = ir_length;
-		}
-	}
-
-	/* PXA3xx shifts the JTAG instructions */
+	/* PXA3xx with 11 bit IR shifts the JTAG instructions */
 	if (tap->ir_length == 11)
 		xscale->xscale_variant = XSCALE_PXA3XX;
 	else
@@ -3033,8 +3007,7 @@ static int xscale_target_create(struct target *target, Jim_Interp *interp)
 	if (!xscale)
 		return ERROR_FAIL;
 
-	return xscale_init_arch_info(target, xscale, target->tap,
-			target->variant);
+	return xscale_init_arch_info(target, xscale, target->tap);
 }
 
 COMMAND_HANDLER(xscale_handle_debug_handler_command)

tcl/board/at91cap7a-stk-sdram.cfg

@@ -24,7 +24,7 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-start {
 	# start off real slow when we're running off internal RC oscillator

tcl/target/at91r40008.cfg

@@ -25,5 +25,5 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0

tcl/target/at91sam7se512.cfg

@@ -29,7 +29,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 # The target
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup 0
 

tcl/target/at91sam7sx.cfg

@@ -23,7 +23,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 set _TARGETNAME $_CHIPNAME.cpu
 
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 $_TARGETNAME configure -event reset-init {
         soft_reset_halt
         # RSTC_CR : Reset peripherals

tcl/target/at91sam7x256.cfg

@@ -22,7 +22,7 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-init {
 	# disable watchdog

tcl/target/at91sam7x512.cfg

@@ -22,7 +22,7 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-init {
 	# disable watchdog

tcl/target/at91sam9.cfg

@@ -34,4 +34,4 @@ adapter_khz 3
 ######################
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME

tcl/target/cs351x.cfg

@@ -20,7 +20,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 # Create the GDB Target.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
+target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # There is 16K of SRAM on this chip
 # FIXME: flash programming is not working by using this work area. So comment this out for now.

tcl/target/faux.cfg

@@ -23,7 +23,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 #target configuration
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 #dummy flash driver
 set _FLASHNAME $_CHIPNAME.flash

tcl/target/gp326xxxa.cfg

@@ -24,7 +24,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 set _TARGETNAME $_CHIPNAME.cpu
 
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # Use internal SRAM as a work area
 $_TARGETNAME configure -work-area-phys 0xf8000000 -work-area-size 0x8000 -work-area-backup 0

tcl/target/imx21.cfg

@@ -29,6 +29,6 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 # Create the GDB Target.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 arm7_9 dcc_downloads enable

tcl/target/imx27.cfg

@@ -39,7 +39,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 # Create the GDB Target.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 # REVISIT what operating environment sets up this virtual address mapping?
 $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
 	-work-area-size 0x8000 -work-area-backup 1

tcl/target/imx28.cfg

@@ -33,6 +33,6 @@ jtag newtap $_CHIPNAME cpu  -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_C
 
 # Create the GDB Target.
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 arm7_9 dcc_downloads enable

tcl/target/is5114.cfg

@@ -36,7 +36,7 @@ jtag newtap $_CHIPNAME unknown2 -irlen 5 -ircapture 1 -irmask 1
 
 #arm946e-s and
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-start { adapter_khz 16 }
 $_TARGETNAME configure -event reset-init {

tcl/target/ixp42x.cfg

@@ -27,7 +27,7 @@ set _CPUTAPID6 0x29277013
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3 -expected-id $_CPUTAPID4 -expected-id $_CPUTAPID5 -expected-id $_CPUTAPID6
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
 
 
 # register constants for IXP42x SDRAM controller

tcl/target/ks869x.cfg

@@ -25,7 +25,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 
 set _TARGETNAME $_CHIPNAME.cpu
 
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x20000 -work-area-size 0x20000 -work-area-backup 0
 

tcl/target/lpc2900.cfg

@@ -42,7 +42,7 @@ if { $HAS_ETB == 1 } {
     jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
     # Create the ".cpu" target
-    target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME -variant arm966e
+    target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME
 
     # Configure ETM and ETB
     etm config $_TARGETNAME 8 normal full etb
@@ -53,7 +53,7 @@ if { $HAS_ETB == 1 } {
     jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
     # Create the ".cpu" target
-    target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME -variant arm966e
+    target create $_TARGETNAME arm966e -endian little -chain-position $_TARGETNAME
 }
 
 arm7_9 dbgrq enable

tcl/target/pxa270.cfg

@@ -44,7 +44,7 @@ jtag_ntrst_delay 250
 set _TARGETNAME $_CHIPNAME.cpu
 jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID -expected-id $_CPUTAPID2 -expected-id $_CPUTAPID3
 
-target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant pxa27x
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
 # maps to PXA internal RAM. If you are using a PXA255
 # you must initialize SDRAM or leave this option off
 $_TARGETNAME configure -work-area-phys 0x5c000000 -work-area-size 0x10000 -work-area-backup 0

tcl/target/pxa3xx.cfg

@@ -80,7 +80,7 @@ jtag newtap $_CHIPNAME cpu -irlen 11 -ircapture 0x1 -irmask 0x7f \
 	-expected-id $_CPUTAPID_PXA32X_C0
 
 target create $_TARGETNAME xscale -endian $_ENDIAN \
-	-chain-position $_TARGETNAME -variant pxa3xx
+	-chain-position $_TARGETNAME
 
 # work area in internal RAM.
 $_TARGETNAME configure -work-area-phys 0x5c030000 -work-area-size 0x10000

tcl/target/samsung_s3c2410.cfg

@@ -27,7 +27,7 @@ reset_config trst_and_srst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x30800000 -work-area-size 0x20000 -work-area-backup 0
 

tcl/target/samsung_s3c2440.cfg

@@ -26,7 +26,7 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm920t
+target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -work-area-phys 0x200000 -work-area-size 0x4000 -work-area-backup 1
 

tcl/target/samsung_s3c2450.cfg

@@ -36,7 +36,7 @@ if { [info exists CPUTAPID] } {
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm926ejs
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
 
 # FIX!!!!! should this really use srst_pulls_trst?
 # With srst_pulls_trst "reset halt" will not reset into the

tcl/target/samsung_s3c6410.cfg

@@ -38,7 +38,7 @@ jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETBTAPID
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm1176
+target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
 
 adapter_nsrst_delay 500
 jtag_ntrst_delay 500

tcl/target/smp8634.cfg

@@ -28,4 +28,4 @@ reset_config trst_and_srst separate
 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME mips_m4k -endian $_ENDIAN -variant
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN

tcl/target/str710.cfg

@@ -27,7 +27,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-start { adapter_khz 10 }
 $_TARGETNAME configure -event reset-init {

tcl/target/str730.cfg

@@ -31,7 +31,7 @@ adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian little -chain-position 0
 
 $_TARGETNAME configure -event reset-start { adapter_khz 10 }
 $_TARGETNAME configure -event reset-init {

tcl/target/str750.cfg

@@ -33,7 +33,7 @@ adapter_nsrst_delay 500
 jtag_ntrst_delay 500
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create $_TARGETNAME arm7tdmi -endian little -chain-position 0
 
 $_TARGETNAME configure -event reset-start { adapter_khz 10 }
 $_TARGETNAME configure -event reset-init {

tcl/target/str912.cfg

@@ -46,7 +46,7 @@ if { [info exists BSTAPID] } {
 jtag newtap $_CHIPNAME bs -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_BSTAPID -ignore-version
 
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm966e
+target create $_TARGETNAME arm966e -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-start { adapter_khz 16 }
 

tcl/target/test_reset_syntax_error.cfg

@@ -9,7 +9,7 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
 
 #target configuration
 set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
 
 $_TARGETNAME configure -event reset-init {
 

tcl/target/ti_calypso.cfg

@@ -42,7 +42,7 @@ jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP
 # target
 
 set _TARGETNAME $_CHIPNAME.arm
-target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME -variant calypso
+target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME
 
 # workarea
 

testing/examples/AT91R40008Test/prj/at91r40008_turtle.cfg

@@ -23,7 +23,7 @@ reset_config srst_only srst_pulls_trst
 jtag newtap at91 cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x3C000 -work-area-size 0x4000 -work-area-backup false
 
 target_script 0 reset .\prj\at91r40008_reset.script

testing/examples/LPC2148Test/prj/lpc2148_jtagkey.cfg

@@ -21,7 +21,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap lpc cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false
 
 #flash bank lpc2000 <base> <size> 0 0 <target#> <variant>

testing/examples/LPC2294Test/prj/lpc2294_jtagkey.cfg

@@ -21,7 +21,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap lpc cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup false
 
 #flash configuration

testing/examples/SAM7S256Test/prj/sam7s256_jtagkey.cfg

@@ -24,7 +24,7 @@ reset_config srst_only srst_pulls_trst
 jtag newtap sam7 cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
 
 target_script 0 reset .\prj\sam7s256_reset.script

testing/examples/SAM7X256Test/prj/sam7x256_jtagkey.cfg

@@ -24,7 +24,7 @@ reset_config srst_only srst_pulls_trst
 jtag newtap sam7 cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x4000 -work-area-backup false
 
 target_script 0 reset .\prj\sam7x256_reset.script

testing/examples/STR710JtagSpeed/prj/str710_jtagkey.cfg

@@ -21,7 +21,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap str7 cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false
 
 #flash bank str7x <base> <size> 0 0 <target#> <variant>

testing/examples/STR710Test/prj/str710_jtagkey.cfg

@@ -21,7 +21,7 @@ reset_config trst_and_srst srst_pulls_trst
 jtag newtap str7 cpu -irlen 4 -irmask 0xf
 
 #target configuration
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
+target create target0 arm7tdmi -endian little -chain-position 0
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup false
 
 target_script 0 gdb_program_config .\prj\str710_program.script

testing/examples/STR912Test/prj/str912_jtagkey.cfg

@@ -26,7 +26,7 @@ jtag newtap str9 cpu -irlen 4 -irmask 0xf
 jtag newtap str9 bs -irlen 5
 
 #target configuration
-target create target0 arm966e -endian little -chain-position 1 -variant arm966e
+target create target0 arm966e -endian little -chain-position 1
 [new_target_name] configure -work-area-virt 0 -work-area-phys 0x50000000 -work-area-size 16384 -work-area-backup false
 
 target_script 0 gdb_program_config .\prj\str912_program.script