@@ -214,15 +214,9 @@ static void usbprog_end_state(tap_state_t state) | |||||
static void usbprog_state_move(void) | static void usbprog_state_move(void) | ||||
{ | { | ||||
int i = 0, tms = 0; | |||||
uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state()); | uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state()); | ||||
int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state()); | |||||
usbprog_jtag_write_tms(usbprog_jtag_handle, (char)tms_scan); | usbprog_jtag_write_tms(usbprog_jtag_handle, (char)tms_scan); | ||||
for (i = 0; i < tms_count; i++) | |||||
{ | |||||
tms = (tms_scan >> i) & 1; | |||||
} | |||||
tap_set_state(tap_get_end_state()); | tap_set_state(tap_get_end_state()); | ||||
} | } | ||||
@@ -666,15 +666,12 @@ static int arm_simulate_step_core(struct target *target, | |||||
} | } | ||||
else | else | ||||
{ | { | ||||
enum arm_mode mode = sim->get_mode(sim); | |||||
int update_cpsr = 0; | int update_cpsr = 0; | ||||
if (instruction.info.load_store_multiple.S) | if (instruction.info.load_store_multiple.S) | ||||
{ | { | ||||
if (instruction.info.load_store_multiple.register_list & 0x8000) | if (instruction.info.load_store_multiple.register_list & 0x8000) | ||||
update_cpsr = 1; | update_cpsr = 1; | ||||
else | |||||
mode = ARM_MODE_USR; | |||||
} | } | ||||
for (i = 0; i < 16; i++) | for (i = 0; i < 16; i++) | ||||
@@ -722,7 +719,6 @@ static int arm_simulate_step_core(struct target *target, | |||||
uint32_t Rn = sim->get_reg_mode(sim, | uint32_t Rn = sim->get_reg_mode(sim, | ||||
instruction.info.load_store_multiple.Rn); | instruction.info.load_store_multiple.Rn); | ||||
int bits_set = 0; | int bits_set = 0; | ||||
enum arm_mode mode = sim->get_mode(sim); | |||||
for (i = 0; i < 16; i++) | for (i = 0; i < 16; i++) | ||||
{ | { | ||||
@@ -730,11 +726,6 @@ static int arm_simulate_step_core(struct target *target, | |||||
bits_set++; | bits_set++; | ||||
} | } | ||||
if (instruction.info.load_store_multiple.S) | |||||
{ | |||||
mode = ARM_MODE_USR; | |||||
} | |||||
switch (instruction.info.load_store_multiple.addressing_mode) | switch (instruction.info.load_store_multiple.addressing_mode) | ||||
{ | { | ||||
case 0: /* Increment after */ | case 0: /* Increment after */ | ||||
@@ -304,31 +304,21 @@ static int etb_write_reg(struct reg *reg, uint32_t value) | |||||
{ | { | ||||
struct etb_reg *etb_reg = reg->arch_info; | struct etb_reg *etb_reg = reg->arch_info; | ||||
uint8_t reg_addr = etb_reg->addr & 0x7f; | uint8_t reg_addr = etb_reg->addr & 0x7f; | ||||
struct scan_field fields[3]; | |||||
LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value); | LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value); | ||||
etb_scann(etb_reg->etb, 0x0); | etb_scann(etb_reg->etb, 0x0); | ||||
etb_set_instr(etb_reg->etb, 0xc); | etb_set_instr(etb_reg->etb, 0xc); | ||||
fields[0].num_bits = 32; | |||||
uint8_t temp0[4]; | uint8_t temp0[4]; | ||||
fields[0].out_value = temp0; | |||||
buf_set_u32(&temp0, 0, 32, value); | buf_set_u32(&temp0, 0, 32, value); | ||||
fields[0].in_value = NULL; | |||||
fields[1].num_bits = 7; | |||||
uint8_t temp1; | uint8_t temp1; | ||||
fields[1].out_value = &temp1; | |||||
buf_set_u32(&temp1, 0, 7, reg_addr); | buf_set_u32(&temp1, 0, 7, reg_addr); | ||||
fields[1].in_value = NULL; | |||||
fields[2].num_bits = 1; | |||||
uint8_t temp2; | uint8_t temp2; | ||||
fields[2].out_value = &temp2; | |||||
buf_set_u32(&temp2, 0, 1, 1); | buf_set_u32(&temp2, 0, 1, 1); | ||||
fields[2].in_value = NULL; | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||