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Merge commit 'origin/master'

tags/v0.3.0-rc0
Øyvind Harboe 14 years ago
parent
commit
20a3b14828
4 changed files with 60 additions and 13 deletions
  1. +2
    -0
      NEWS
  2. +22
    -8
      src/helper/startup.tcl
  3. +4
    -2
      src/jtag/core.c
  4. +32
    -3
      tcl/target/pxa255.cfg

+ 2
- 0
NEWS View File

@@ -8,6 +8,7 @@ JTAG Layer:
New reset_config options for SRST gating the JTAG clock (or not)
TAP declaration no longer requires ircapture and mask attributes
New "post-reset" event handler for TAP-invariant setup code
Overridable Tcl "init_reset" and "jtag_init" procedures

Target Layer:
New commands for use with Cortex-M3 processors:
@@ -38,6 +39,7 @@ Board, Target, and Interface Configuration Scripts:
Samsung s3c2450
Mini2440 board
Numeric TAP and Target identifiers now trigger warnings
PXA255 partially enumerates

Documentation:
Capture more debugging and setup advice


+ 22
- 8
src/helper/startup.tcl View File

@@ -134,6 +134,23 @@ proc ocd_gdb_restart {target_id} {
reset halt
}


# This reset logic may be overridden by board/target/... scripts as needed
# to provide a reset that, if possible, is close to a power-up reset.
#
# Exit requirements include: (a) JTAG must be working, (b) the scan
# chain was validated with "jtag arp_init" (or equivalent), (c) nothing
# stays in reset. No TAP-specific scans were performed. It's OK if
# some targets haven't been reset yet; they may need TAP-specific scans.
#
# The "mode" values include: halt, init, run (from "reset" command);
# startup (at OpenOCD server startup, when JTAG may not yet work); and
# potentially more (for reset types like cold, warm, etc)
proc init_reset { mode } {
jtag arp_init-reset
}


global in_process_reset
set in_process_reset 0

@@ -189,10 +206,7 @@ proc ocd_process_reset_inner { MODE } {

# Use TRST or TMS/TCK operations to reset all the tap controllers.
# TAP reset events get reported; they might enable some taps.
#
# REVISIT arp_init-reset pulses SRST (if it can) with TRST active;
# but SRST events aren't reported (unlike "jtag arp_reset", below)
jtag arp_init-reset
init_reset $MODE

# Examine all targets on enabled taps.
foreach t $targets {
@@ -361,11 +375,11 @@ proc capture_catch {a} {
}


# Executed during "init". Can be implemented by target script
# tar
# Executed during "init". Can be overridden
# by board/target/... scripts
proc jtag_init {} {
if {[catch {jtag arp_init} err]!=0} {
# try resetting additionally
jtag arp_init-reset
init_reset startup
}
}
}

+ 4
- 2
src/jtag/core.c View File

@@ -973,8 +973,9 @@ static bool jtag_examine_chain_end(uint8_t *idcodes, unsigned count, unsigned ma
for (; count < max - 31; count += 32)
{
uint32_t idcode = buf_get_u32(idcodes, count, 32);
// do not trigger the warning if the data looks good
if (!triggered && jtag_idcode_is_final(idcode))

/* do not trigger the warning if the data looks good */
if (jtag_idcode_is_final(idcode))
continue;
LOG_WARNING("Unexpected idcode after end of chain: %d 0x%08x",
count, (unsigned int)idcode);
@@ -1027,6 +1028,7 @@ static int jtag_examine_chain(void)
/* DR scan to collect BYPASS or IDCODE register contents.
* Then make sure the scan data has both ones and zeroes.
*/
LOG_DEBUG("DR scan interrogation for IDCODE/BYPASS");
retval = jtag_examine_chain_execute(idcode_buffer, JTAG_MAX_CHAIN_SIZE);
if (retval != ERROR_OK)
return retval;


+ 32
- 3
tcl/target/pxa255.cfg View File

@@ -19,8 +19,37 @@ if { [info exists CPUTAPID ] } {
set _CPUTAPID 0x69264013
}

jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1e -irmask 0x1f -expected-id $_CPUTAPID
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME
debug_level 3
target create $_TARGETNAME xscale -endian $_ENDIAN \
-chain-position $_CHIPNAME.cpu

# PXA255 comes out of reset using 3.6864 MHz oscillator.
# Until the PLL kicks in, keep the JTAG clock slow enough
# that we get no errors.
jtag_khz 300
$_TARGETNAME configure -event "reset-start" { jtag_khz 300 }

# reset processing that works with PXA
proc init_reset {mode} {
# assert both resets; equivalent to power-on reset
jtag_reset 1 1

# drop TRST after at least 32 cycles
sleep 1
jtag_reset 0 1

# minimum 32 TCK cycles to wake up the controller
runtest 50

# now the TAP will be responsive; validate scanchain
jtag arp_init

# ... and take it out of reset
jtag_reset 0 0
}

proc jtag_init {} {
init_reset startup
}

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