Browse Source

Fix a bunch of typos.

Fix a bunch of typos.

Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
tags/v0.5.0-rc1
Uwe Hermann 12 years ago
committed by Øyvind Harboe
parent
commit
33a17fd359
13 changed files with 14 additions and 14 deletions
  1. +1
    -1
      src/flash/nand/mx2.c
  2. +1
    -1
      src/flash/nand/mx3.c
  3. +1
    -1
      src/flash/nor/at91sam3.c
  4. +1
    -1
      src/flash/nor/stellaris.c
  5. +1
    -1
      src/jtag/drivers/buspirate.c
  6. +1
    -1
      src/jtag/drivers/usbprog.c
  7. +1
    -1
      src/server/startup.tcl
  8. +1
    -1
      src/svf/svf.c
  9. +1
    -1
      src/target/armv7m.c
  10. +1
    -1
      src/target/image.c
  11. +1
    -1
      src/target/mips32.c
  12. +1
    -1
      src/target/target.c
  13. +2
    -2
      src/target/target.h

+ 1
- 1
src/flash/nand/mx2.c View File

@@ -105,7 +105,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx27_nand_device_command)
mx2_nf_info->flags.target_little_endian =
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* testing host endianess
* testing host endianness
*/
x = 1;
if (*(char *) &x == 1)


+ 1
- 1
src/flash/nand/mx3.c View File

@@ -100,7 +100,7 @@ NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
mx3_nf_info->flags.target_little_endian =
(nand->target->endianness == TARGET_LITTLE_ENDIAN);
/*
* testing host endianess
* testing host endianness
*/
{
int x = 1;


+ 1
- 1
src/flash/nor/at91sam3.c View File

@@ -2684,7 +2684,7 @@ showall:
(0 == strcmp("clear", CMD_ARGV[0]))) { // quietly accept both
r = FLASHD_ClrGPNVM(&(pChip->details.bank[0]), who);
} else {
command_print(CMD_CTX, "Unkown command: %s", CMD_ARGV[0]);
command_print(CMD_CTX, "Unknown command: %s", CMD_ARGV[0]);
r = ERROR_COMMAND_SYNTAX_ERROR;
}
return r;


+ 1
- 1
src/flash/nor/stellaris.c View File

@@ -841,7 +841,7 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la
* REVISIT DustDevil-A0 parts have an erratum making FMPPE commits
* inadvisable ... it makes future mass erase operations fail.
*/
LOG_WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
LOG_WARNING("Flash protection cannot be removed once committed, commit is NOT executed !");
/* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */

/* Wait until erase complete */


+ 1
- 1
src/jtag/drivers/buspirate.c View File

@@ -45,7 +45,7 @@ static void buspirate_scan(bool ir_scan, enum scan_type type,
uint8_t *buffer, int scan_size, struct scan_command *command);


#define CMD_UNKOWN 0x00
#define CMD_UNKNOWN 0x00
#define CMD_PORT_MODE 0x01
#define CMD_FEATURE 0x02
#define CMD_READ_ADCS 0x03


+ 1
- 1
src/jtag/drivers/usbprog.c View File

@@ -54,7 +54,7 @@ static void usbprog_path_move(struct pathmove_command *cmd);
static void usbprog_runtest(int num_cycles);
static void usbprog_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int scan_size);

#define UNKOWN_COMMAND 0x00
#define UNKNOWN_COMMAND 0x00
#define PORT_DIRECTION 0x01
#define PORT_SET 0x02
#define PORT_GET 0x03


+ 1
- 1
src/server/startup.tcl View File

@@ -1,6 +1,6 @@
# Defines basic Tcl procs for OpenOCD server modules

# Handle GDB 'R' packet. Can be overriden by configuration script,
# Handle GDB 'R' packet. Can be overridden by configuration script,
# but it's not something one would expect target scripts to do
# normally
proc ocd_gdb_restart {target_id} {


+ 1
- 1
src/svf/svf.c View File

@@ -402,7 +402,7 @@ COMMAND_HANDLER(handle_svf_command)

svf_buffer_index = 0;
// double the buffer size
// in case current command cannot be commited, and next command is a bit scan command
// in case current command cannot be committed, and next command is a bit scan command
// here is 32K bits for this big scan command, it should be enough
// buffer will be reallocated if buffer size is not enough
svf_tdi_buffer = (uint8_t *)malloc(2 * SVF_MAX_BUFFER_SIZE_TO_COMMIT);


+ 1
- 1
src/target/armv7m.c View File

@@ -315,7 +315,7 @@ static int armv7m_run_and_wait(struct target *target, uint32_t entry_point, int
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
if (exit_point && (pc != exit_point))
{
LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
}



+ 1
- 1
src/target/image.c View File

@@ -431,7 +431,7 @@ static int image_elf_read_headers(struct image *image)
if ((elf->endianness != ELFDATA2LSB)
&&(elf->endianness != ELFDATA2MSB))
{
LOG_ERROR("invalid ELF file, unknown endianess setting");
LOG_ERROR("invalid ELF file, unknown endianness setting");
return ERROR_IMAGE_FORMAT_ERROR;
}



+ 1
- 1
src/target/mips32.c View File

@@ -351,7 +351,7 @@ static int mips32_run_and_wait(struct target *target, uint32_t entry_point,
pc = buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32);
if (exit_point && (pc != exit_point))
{
LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
LOG_DEBUG("failed algorithm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
}



+ 1
- 1
src/target/target.c View File

@@ -1522,7 +1522,7 @@ int target_checksum_memory(struct target *target, uint32_t address, uint32_t siz
return retval;
}

/* convert to target endianess */
/* convert to target endianness */
for (i = 0; i < (size/sizeof(uint32_t)); i++)
{
uint32_t target_data;


+ 2
- 2
src/target/target.h View File

@@ -84,7 +84,7 @@ enum target_debug_reason
DBG_REASON_UNDEFINED = 6
};

enum target_endianess
enum target_endianness
{
TARGET_ENDIAN_UNKNOWN = 0,
TARGET_BIG_ENDIAN = 1, TARGET_LITTLE_ENDIAN = 2
@@ -139,7 +139,7 @@ struct target
uint32_t backup_working_area; /* whether the content of the working area has to be preserved */
struct working_area *working_areas;/* list of allocated working areas */
enum target_debug_reason debug_reason;/* reason why the target entered debug state */
enum target_endianess endianness; /* target endianess */
enum target_endianness endianness; /* target endianness */
// also see: target_state_name()
enum target_state state; /* the current backend-state (running, halted, ...) */
struct reg_cache *reg_cache; /* the first register cache of the target (core regs) */


Loading…
Cancel
Save