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@@ -82,7 +82,20 @@ jtag configure $_CHIPNAME.jrc -event post-reset "runtest 200" |
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# second core. |
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# |
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set _TARGETNAME $_CHIPNAME.cpu |
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target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap -coreid 0 |
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# APB DBGBASE reads 0x80040000, but this points to an empty ROM table. |
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# 0x80000000 is cpu0 coresight region |
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# |
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# |
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# CORTEX_A8_PADDRDBG_CPU_SHIFT 13 |
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# 0x80000000 | (coreid << CORTEX_A8_PADDRDBG_CPU_SHIFT) |
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set _coreid 0 |
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set _dbgbase [expr 0x80000000 | ($_coreid << 13)] |
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echo "Using dbgbase = [format 0x%x $_dbgbase]" |
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target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap \ |
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-coreid 0 -dbgbase $_dbgbase |
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# SRAM: 56KiB at 0x4030.0000 |
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$_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x1000 |
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