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@@ -0,0 +1,662 @@ |
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/* |
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* Spansion FM4 flash |
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* |
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* Copyright (c) 2015 Andreas Färber |
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* |
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* Based on S6E2CC_MN709-00007 for S6E2CC/C5/C4/C3/C2/C1 series |
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* Based on MB9B560R_MN709-00005 for MB9BFx66/x67/x68 series |
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*/ |
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#ifdef HAVE_CONFIG_H |
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#include "config.h" |
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#endif |
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#include "imp.h" |
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#include <helper/binarybuffer.h> |
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#include <target/algorithm.h> |
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#include <target/armv7m.h> |
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#define FLASH_BASE 0x40000000 |
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#define FASZR (FLASH_BASE + 0x000) |
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#define DFCTRLR (FLASH_BASE + 0x030) |
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#define DFCTRLR_DFE (1UL << 0) |
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#define WDG_BASE 0x40011000 |
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#define WDG_CTL (WDG_BASE + 0x008) |
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#define WDG_LCK (WDG_BASE + 0xC00) |
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enum fm4_variant { |
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mb9bfx66, |
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mb9bfx67, |
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mb9bfx68, |
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s6e2cx8, |
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s6e2cx9, |
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s6e2cxa, |
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}; |
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struct fm4_flash_bank { |
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enum fm4_variant variant; |
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int macro_nr; |
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bool probed; |
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}; |
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static int fm4_disable_hw_watchdog(struct target *target) |
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{ |
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int retval; |
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retval = target_write_u32(target, WDG_LCK, 0x1ACCE551); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_write_u32(target, WDG_LCK, 0xE5331AAE); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_write_u32(target, WDG_CTL, 0); |
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if (retval != ERROR_OK) |
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return retval; |
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return ERROR_OK; |
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} |
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static int fm4_enter_flash_cpu_programming_mode(struct target *target) |
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{ |
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uint32_t u32_value; |
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int retval; |
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/* FASZR ASZ = CPU programming mode */ |
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retval = target_write_u32(target, FASZR, 0x00000001); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_read_u32(target, FASZR, &u32_value); |
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if (retval != ERROR_OK) |
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return retval; |
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return ERROR_OK; |
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} |
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static int fm4_enter_flash_cpu_rom_mode(struct target *target) |
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{ |
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uint32_t u32_value; |
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int retval; |
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/* FASZR ASZ = CPU ROM mode */ |
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retval = target_write_u32(target, FASZR, 0x00000002); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_read_u32(target, FASZR, &u32_value); |
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if (retval != ERROR_OK) |
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return retval; |
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return ERROR_OK; |
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} |
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static int fm4_flash_erase(struct flash_bank *bank, int first, int last) |
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{ |
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struct target *target = bank->target; |
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struct working_area *workarea; |
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struct reg_param reg_params[4]; |
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struct armv7m_algorithm armv7m_algo; |
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unsigned i; |
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int retval, sector; |
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const uint8_t erase_sector_code[] = { |
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#include "../../../contrib/loaders/flash/fm4/erase.inc" |
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}; |
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if (target->state != TARGET_HALTED) { |
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LOG_WARNING("Cannot communicate... target not halted."); |
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return ERROR_TARGET_NOT_HALTED; |
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} |
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LOG_DEBUG("Spansion FM4 erase sectors %d to %d", first, last); |
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retval = fm4_disable_hw_watchdog(target); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = fm4_enter_flash_cpu_programming_mode(target); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_alloc_working_area(target, sizeof(erase_sector_code), |
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&workarea); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("No working area available."); |
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retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; |
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goto err_alloc_code; |
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} |
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retval = target_write_buffer(target, workarea->address, |
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sizeof(erase_sector_code), erase_sector_code); |
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if (retval != ERROR_OK) |
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goto err_write_code; |
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armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; |
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armv7m_algo.core_mode = ARM_MODE_THREAD; |
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT); |
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); |
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init_reg_param(®_params[2], "r2", 32, PARAM_OUT); |
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init_reg_param(®_params[3], "r3", 32, PARAM_IN); |
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for (sector = first; sector <= last; sector++) { |
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uint32_t addr = bank->base + bank->sectors[sector].offset; |
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uint32_t result; |
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buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8); |
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buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554); |
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buf_set_u32(reg_params[2].value, 0, 32, addr); |
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retval = target_run_algorithm(target, |
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0, NULL, |
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ARRAY_SIZE(reg_params), reg_params, |
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workarea->address, 0, |
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1000, &armv7m_algo); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("Error executing flash sector erase " |
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"programming algorithm"); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run; |
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} |
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result = buf_get_u32(reg_params[3].value, 0, 32); |
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if (result == 2) { |
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LOG_ERROR("Timeout error from flash sector erase programming algorithm"); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run_ret; |
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} else if (result != 0) { |
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LOG_ERROR("Unexpected error %d from flash sector erase programming algorithm", result); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run_ret; |
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} else |
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retval = ERROR_OK; |
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bank->sectors[sector].is_erased = 1; |
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} |
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err_run_ret: |
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err_run: |
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for (i = 0; i < ARRAY_SIZE(reg_params); i++) |
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destroy_reg_param(®_params[i]); |
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err_write_code: |
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target_free_working_area(target, workarea); |
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err_alloc_code: |
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if (retval != ERROR_OK) |
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fm4_enter_flash_cpu_rom_mode(target); |
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else |
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retval = fm4_enter_flash_cpu_rom_mode(target); |
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return retval; |
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} |
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static int fm4_flash_write(struct flash_bank *bank, const uint8_t *buffer, |
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uint32_t offset, uint32_t byte_count) |
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{ |
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struct target *target = bank->target; |
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struct working_area *code_workarea, *data_workarea; |
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struct reg_param reg_params[6]; |
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struct armv7m_algorithm armv7m_algo; |
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uint32_t halfword_count = DIV_ROUND_UP(byte_count, 2); |
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uint32_t result; |
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unsigned i; |
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int retval; |
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const uint8_t write_block_code[] = { |
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#include "../../../contrib/loaders/flash/fm4/write.inc" |
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}; |
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LOG_DEBUG("Spansion FM4 write at 0x%08" PRIx32 " (%" PRId32 " bytes)", |
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offset, byte_count); |
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if (offset & 0x1) { |
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LOG_ERROR("offset 0x%" PRIx32 " breaks required 2-byte alignment", |
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offset); |
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return ERROR_FLASH_DST_BREAKS_ALIGNMENT; |
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} |
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if (byte_count & 0x1) { |
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LOG_WARNING("length %" PRId32 " is not 2-byte aligned, rounding up", |
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byte_count); |
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} |
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if (target->state != TARGET_HALTED) { |
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LOG_WARNING("Cannot communicate... target not halted."); |
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return ERROR_TARGET_NOT_HALTED; |
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} |
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retval = fm4_disable_hw_watchdog(target); |
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if (retval != ERROR_OK) |
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return retval; |
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retval = target_alloc_working_area(target, sizeof(write_block_code), |
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&code_workarea); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("No working area available for write code."); |
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return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; |
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} |
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retval = target_write_buffer(target, code_workarea->address, |
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sizeof(write_block_code), write_block_code); |
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if (retval != ERROR_OK) |
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goto err_write_code; |
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retval = target_alloc_working_area(target, |
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MIN(halfword_count * 2, target_get_working_area_avail(target)), |
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&data_workarea); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("No working area available for write data."); |
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retval = ERROR_TARGET_RESOURCE_NOT_AVAILABLE; |
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goto err_alloc_data; |
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} |
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armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC; |
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armv7m_algo.core_mode = ARM_MODE_THREAD; |
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init_reg_param(®_params[0], "r0", 32, PARAM_OUT); |
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init_reg_param(®_params[1], "r1", 32, PARAM_OUT); |
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init_reg_param(®_params[2], "r2", 32, PARAM_OUT); |
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init_reg_param(®_params[3], "r3", 32, PARAM_OUT); |
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init_reg_param(®_params[4], "r4", 32, PARAM_OUT); |
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init_reg_param(®_params[5], "r5", 32, PARAM_IN); |
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retval = fm4_enter_flash_cpu_programming_mode(target); |
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if (retval != ERROR_OK) |
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goto err_flash_mode; |
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while (byte_count > 0) { |
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uint32_t halfwords = MIN(halfword_count, data_workarea->size / 2); |
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uint32_t addr = bank->base + offset; |
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LOG_DEBUG("copying %" PRId32 " bytes to SRAM 0x%08" PRIx32, |
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MIN(halfwords * 2, byte_count), data_workarea->address); |
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retval = target_write_buffer(target, data_workarea->address, |
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MIN(halfwords * 2, byte_count), buffer); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("Error writing data buffer"); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_write_data; |
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} |
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LOG_DEBUG("writing 0x%08" PRIx32 "-0x%08" PRIx32 " (%" PRId32 "x)", |
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addr, addr + halfwords * 2 - 1, halfwords); |
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buf_set_u32(reg_params[0].value, 0, 32, (addr & ~0xffff) | 0xAA8); |
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buf_set_u32(reg_params[1].value, 0, 32, (addr & ~0xffff) | 0x554); |
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buf_set_u32(reg_params[2].value, 0, 32, addr); |
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buf_set_u32(reg_params[3].value, 0, 32, data_workarea->address); |
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buf_set_u32(reg_params[4].value, 0, 32, halfwords); |
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retval = target_run_algorithm(target, |
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0, NULL, |
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ARRAY_SIZE(reg_params), reg_params, |
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code_workarea->address, 0, |
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5 * 60 * 1000, &armv7m_algo); |
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if (retval != ERROR_OK) { |
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LOG_ERROR("Error executing flash sector erase " |
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"programming algorithm"); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run; |
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} |
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result = buf_get_u32(reg_params[5].value, 0, 32); |
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if (result == 2) { |
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LOG_ERROR("Timeout error from flash write " |
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"programming algorithm"); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run_ret; |
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} else if (result != 0) { |
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LOG_ERROR("Unexpected error %d from flash write " |
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"programming algorithm", result); |
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retval = ERROR_FLASH_OPERATION_FAILED; |
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goto err_run_ret; |
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} else |
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retval = ERROR_OK; |
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halfword_count -= halfwords; |
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offset += halfwords * 2; |
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buffer += halfwords * 2; |
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byte_count -= MIN(halfwords * 2, byte_count); |
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} |
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err_run_ret: |
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err_run: |
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err_write_data: |
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retval = fm4_enter_flash_cpu_rom_mode(target); |
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err_flash_mode: |
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for (i = 0; i < ARRAY_SIZE(reg_params); i++) |
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destroy_reg_param(®_params[i]); |
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target_free_working_area(target, data_workarea); |
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err_alloc_data: |
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err_write_code: |
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target_free_working_area(target, code_workarea); |
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return retval; |
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} |
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static int mb9bf_probe(struct flash_bank *bank) |
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{ |
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struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
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uint32_t flash_addr = bank->base; |
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int i; |
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switch (fm4_bank->variant) { |
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case mb9bfx66: |
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bank->num_sectors = 12; |
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break; |
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case mb9bfx67: |
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bank->num_sectors = 16; |
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break; |
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case mb9bfx68: |
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bank->num_sectors = 20; |
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break; |
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default: |
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return ERROR_FLASH_OPER_UNSUPPORTED; |
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} |
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LOG_DEBUG("%d sectors", bank->num_sectors); |
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bank->sectors = calloc(bank->num_sectors, |
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sizeof(struct flash_sector)); |
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for (i = 0; i < bank->num_sectors; i++) { |
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if (i < 4) |
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bank->sectors[i].size = 8 * 1024; |
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else if (i == 4) |
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bank->sectors[i].size = 32 * 1024; |
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else |
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bank->sectors[i].size = 64 * 1024; |
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bank->sectors[i].offset = flash_addr - bank->base; |
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bank->sectors[i].is_erased = -1; |
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bank->sectors[i].is_protected = -1; |
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bank->size += bank->sectors[i].size; |
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flash_addr += bank->sectors[i].size; |
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} |
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return ERROR_OK; |
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} |
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static void s6e2cc_init_sector(struct flash_sector *sector, int sa) |
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{ |
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if (sa < 8) |
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sector->size = 8 * 1024; |
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else if (sa == 8) |
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sector->size = 32 * 1024; |
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else |
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sector->size = 64 * 1024; |
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sector->is_erased = -1; |
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sector->is_protected = -1; |
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} |
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static int s6e2cc_probe(struct flash_bank *bank) |
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{ |
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|
struct target *target = bank->target; |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
uint32_t u32_value; |
|
|
|
uint32_t flash_addr = bank->base; |
|
|
|
int i, retval, num_sectors, num_extra_sectors; |
|
|
|
|
|
|
|
retval = target_read_u32(target, DFCTRLR, &u32_value); |
|
|
|
if (retval != ERROR_OK) |
|
|
|
return retval; |
|
|
|
if (u32_value & DFCTRLR_DFE) { |
|
|
|
LOG_WARNING("Dual Flash mode is not implemented."); |
|
|
|
return ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
|
|
|
|
switch (fm4_bank->variant) { |
|
|
|
case s6e2cx8: |
|
|
|
num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 0; |
|
|
|
break; |
|
|
|
case s6e2cx9: |
|
|
|
num_sectors = (fm4_bank->macro_nr == 0) ? 20 : 12; |
|
|
|
break; |
|
|
|
case s6e2cxa: |
|
|
|
num_sectors = 20; |
|
|
|
break; |
|
|
|
default: |
|
|
|
return ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
num_extra_sectors = (fm4_bank->macro_nr == 0) ? 1 : 4; |
|
|
|
bank->num_sectors = num_sectors + num_extra_sectors; |
|
|
|
|
|
|
|
LOG_DEBUG("%d sectors", bank->num_sectors); |
|
|
|
bank->sectors = calloc(bank->num_sectors, |
|
|
|
sizeof(struct flash_sector)); |
|
|
|
for (i = 0; i < num_sectors; i++) { |
|
|
|
int sa = 4 + i; |
|
|
|
bank->sectors[i].offset = flash_addr - bank->base; |
|
|
|
s6e2cc_init_sector(&bank->sectors[i], sa); |
|
|
|
|
|
|
|
bank->size += bank->sectors[i].size; |
|
|
|
flash_addr += bank->sectors[i].size; |
|
|
|
} |
|
|
|
|
|
|
|
flash_addr = (fm4_bank->macro_nr == 0) ? 0x00406000 : 0x00408000; |
|
|
|
for (; i < bank->num_sectors; i++) { |
|
|
|
int sa = 4 - num_extra_sectors + (i - num_sectors); |
|
|
|
bank->sectors[i].offset = flash_addr - bank->base; |
|
|
|
s6e2cc_init_sector(&bank->sectors[i], sa); |
|
|
|
|
|
|
|
/* |
|
|
|
* Don't increase bank->size for these sectors |
|
|
|
* to avoid an overlap between Flash Macros #0 and #1. |
|
|
|
*/ |
|
|
|
flash_addr += bank->sectors[i].size; |
|
|
|
} |
|
|
|
|
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
static int fm4_probe(struct flash_bank *bank) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
int retval; |
|
|
|
|
|
|
|
if (fm4_bank->probed) |
|
|
|
return ERROR_OK; |
|
|
|
|
|
|
|
if (bank->target->state != TARGET_HALTED) { |
|
|
|
LOG_WARNING("Cannot communicate... target not halted."); |
|
|
|
return ERROR_TARGET_NOT_HALTED; |
|
|
|
} |
|
|
|
|
|
|
|
switch (fm4_bank->variant) { |
|
|
|
case mb9bfx66: |
|
|
|
case mb9bfx67: |
|
|
|
case mb9bfx68: |
|
|
|
retval = mb9bf_probe(bank); |
|
|
|
break; |
|
|
|
case s6e2cx8: |
|
|
|
case s6e2cx9: |
|
|
|
case s6e2cxa: |
|
|
|
retval = s6e2cc_probe(bank); |
|
|
|
break; |
|
|
|
default: |
|
|
|
return ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
if (retval != ERROR_OK) |
|
|
|
return retval; |
|
|
|
|
|
|
|
fm4_bank->probed = true; |
|
|
|
|
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
static int fm4_auto_probe(struct flash_bank *bank) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
|
|
|
|
if (fm4_bank->probed) |
|
|
|
return ERROR_OK; |
|
|
|
|
|
|
|
return fm4_probe(bank); |
|
|
|
} |
|
|
|
|
|
|
|
static int fm4_protect_check(struct flash_bank *bank) |
|
|
|
{ |
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
static int fm4_get_info_command(struct flash_bank *bank, char *buf, int buf_size) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
const char *name; |
|
|
|
|
|
|
|
if (bank->target->state != TARGET_HALTED) { |
|
|
|
LOG_WARNING("Cannot communicate... target not halted."); |
|
|
|
return ERROR_TARGET_NOT_HALTED; |
|
|
|
} |
|
|
|
|
|
|
|
switch (fm4_bank->variant) { |
|
|
|
case mb9bfx66: |
|
|
|
name = "MB9BFx66"; |
|
|
|
break; |
|
|
|
case mb9bfx67: |
|
|
|
name = "MB9BFx67"; |
|
|
|
break; |
|
|
|
case mb9bfx68: |
|
|
|
name = "MB9BFx68"; |
|
|
|
break; |
|
|
|
case s6e2cx8: |
|
|
|
name = "S6E2Cx8"; |
|
|
|
break; |
|
|
|
case s6e2cx9: |
|
|
|
name = "S6E2Cx9"; |
|
|
|
break; |
|
|
|
case s6e2cxa: |
|
|
|
name = "S6E2CxA"; |
|
|
|
break; |
|
|
|
default: |
|
|
|
name = "unknown"; |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
switch (fm4_bank->variant) { |
|
|
|
case s6e2cx8: |
|
|
|
case s6e2cx9: |
|
|
|
case s6e2cxa: |
|
|
|
snprintf(buf, buf_size, "%s MainFlash Macro #%i", |
|
|
|
name, fm4_bank->macro_nr); |
|
|
|
break; |
|
|
|
default: |
|
|
|
snprintf(buf, buf_size, "%s MainFlash", name); |
|
|
|
break; |
|
|
|
} |
|
|
|
|
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
static bool fm4_name_match(const char *s, const char *pattern) |
|
|
|
{ |
|
|
|
int i = 0; |
|
|
|
|
|
|
|
while (s[i]) { |
|
|
|
/* If the match string is shorter, ignore excess */ |
|
|
|
if (!pattern[i]) |
|
|
|
return true; |
|
|
|
/* Use x as wildcard */ |
|
|
|
if (pattern[i] != 'x' && tolower(s[i]) != tolower(pattern[i])) |
|
|
|
return false; |
|
|
|
i++; |
|
|
|
} |
|
|
|
return true; |
|
|
|
} |
|
|
|
|
|
|
|
static int mb9bf_bank_setup(struct flash_bank *bank, const char *variant) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
|
|
|
|
if (fm4_name_match(variant, "MB9BFx66")) { |
|
|
|
fm4_bank->variant = mb9bfx66; |
|
|
|
} else if (fm4_name_match(variant, "MB9BFx67")) { |
|
|
|
fm4_bank->variant = mb9bfx67; |
|
|
|
} else if (fm4_name_match(variant, "MB9BFx68")) { |
|
|
|
fm4_bank->variant = mb9bfx68; |
|
|
|
} else { |
|
|
|
LOG_WARNING("MB9BF variant %s not recognized.", variant); |
|
|
|
return ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
|
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
static int s6e2cc_bank_setup(struct flash_bank *bank, const char *variant) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank = bank->driver_priv; |
|
|
|
|
|
|
|
if (fm4_name_match(variant, "S6E2Cx8")) { |
|
|
|
fm4_bank->variant = s6e2cx8; |
|
|
|
} else if (fm4_name_match(variant, "S6E2Cx9")) { |
|
|
|
fm4_bank->variant = s6e2cx9; |
|
|
|
} else if (fm4_name_match(variant, "S6E2CxA")) { |
|
|
|
fm4_bank->variant = s6e2cxa; |
|
|
|
} else { |
|
|
|
LOG_WARNING("S6E2CC variant %s not recognized.", variant); |
|
|
|
return ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
|
|
|
|
return ERROR_OK; |
|
|
|
} |
|
|
|
|
|
|
|
FLASH_BANK_COMMAND_HANDLER(fm4_flash_bank_command) |
|
|
|
{ |
|
|
|
struct fm4_flash_bank *fm4_bank; |
|
|
|
const char *variant; |
|
|
|
int ret; |
|
|
|
|
|
|
|
if (CMD_ARGC < 7) |
|
|
|
return ERROR_COMMAND_SYNTAX_ERROR; |
|
|
|
|
|
|
|
variant = CMD_ARGV[6]; |
|
|
|
|
|
|
|
fm4_bank = malloc(sizeof(struct fm4_flash_bank)); |
|
|
|
if (!fm4_bank) |
|
|
|
return ERROR_FLASH_OPERATION_FAILED; |
|
|
|
|
|
|
|
fm4_bank->probed = false; |
|
|
|
fm4_bank->macro_nr = (bank->base == 0x00000000) ? 0 : 1; |
|
|
|
|
|
|
|
bank->driver_priv = fm4_bank; |
|
|
|
|
|
|
|
if (fm4_name_match(variant, "MB9BF")) |
|
|
|
ret = mb9bf_bank_setup(bank, variant); |
|
|
|
else if (fm4_name_match(variant, "S6E2Cx")) |
|
|
|
ret = s6e2cc_bank_setup(bank, variant); |
|
|
|
else { |
|
|
|
LOG_WARNING("Family %s not recognized.", variant); |
|
|
|
ret = ERROR_FLASH_OPER_UNSUPPORTED; |
|
|
|
} |
|
|
|
if (ret != ERROR_OK) |
|
|
|
free(fm4_bank); |
|
|
|
return ret; |
|
|
|
} |
|
|
|
|
|
|
|
static const struct command_registration fm4_exec_command_handlers[] = { |
|
|
|
COMMAND_REGISTRATION_DONE |
|
|
|
}; |
|
|
|
|
|
|
|
static const struct command_registration fm4_command_handlers[] = { |
|
|
|
{ |
|
|
|
.name = "fm4", |
|
|
|
.mode = COMMAND_ANY, |
|
|
|
.help = "fm4 flash command group", |
|
|
|
.usage = "", |
|
|
|
.chain = fm4_exec_command_handlers, |
|
|
|
}, |
|
|
|
COMMAND_REGISTRATION_DONE |
|
|
|
}; |
|
|
|
|
|
|
|
struct flash_driver fm4_flash = { |
|
|
|
.name = "fm4", |
|
|
|
.commands = fm4_command_handlers, |
|
|
|
.flash_bank_command = fm4_flash_bank_command, |
|
|
|
.info = fm4_get_info_command, |
|
|
|
.probe = fm4_probe, |
|
|
|
.auto_probe = fm4_auto_probe, |
|
|
|
.protect_check = fm4_protect_check, |
|
|
|
.erase = fm4_flash_erase, |
|
|
|
.erase_check = default_flash_blank_check, |
|
|
|
.write = fm4_flash_write, |
|
|
|
}; |