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@@ -19,8 +19,37 @@ if { [info exists CPUTAPID ] } { |
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set _CPUTAPID 0x69264013 |
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} |
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1e -irmask 0x1f -expected-id $_CPUTAPID |
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jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID |
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set _TARGETNAME $_CHIPNAME.cpu |
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target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME |
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debug_level 3 |
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target create $_TARGETNAME xscale -endian $_ENDIAN \ |
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-chain-position $_CHIPNAME.cpu |
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# PXA255 comes out of reset using 3.6864 MHz oscillator. |
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# Until the PLL kicks in, keep the JTAG clock slow enough |
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# that we get no errors. |
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jtag_khz 300 |
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$_TARGETNAME configure -event "reset-start" { jtag_khz 300 } |
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# reset processing that works with PXA |
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proc init_reset {mode} { |
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# assert both resets; equivalent to power-on reset |
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jtag_reset 1 1 |
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# drop TRST after at least 32 cycles |
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sleep 1 |
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jtag_reset 0 1 |
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# minimum 32 TCK cycles to wake up the controller |
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runtest 50 |
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# now the TAP will be responsive; validate scanchain |
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jtag arp_init |
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# ... and take it out of reset |
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jtag_reset 0 0 |
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} |
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proc jtag_init {} { |
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init_reset startup |
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} |