Obsolete C source code semicolons were removed using the semantic patch semicolon/semicolon.cocci, see coccinellery.org Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3367 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>tags/v0.10.0-rc1
@@ -1275,7 +1275,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("No working area available, can't do block memory writes"); | LOG_WARNING("No working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
; | |||||
/* write algorithm code to working area */ | /* write algorithm code to working area */ | ||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
@@ -1297,7 +1296,6 @@ static int cfi_intel_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
goto cleanup; | goto cleanup; | ||||
} | } | ||||
} | } | ||||
; | |||||
/* setup algo registers */ | /* setup algo registers */ | ||||
init_reg_param(®_params[0], "r0", 32, PARAM_OUT); | init_reg_param(®_params[0], "r0", 32, PARAM_OUT); | ||||
@@ -1540,7 +1538,6 @@ static int cfi_spansion_write_block_mips(struct flash_bank *bank, const uint8_t | |||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
} | } | ||||
; | |||||
init_reg_param(®_params[0], "r4", 32, PARAM_OUT); | init_reg_param(®_params[0], "r4", 32, PARAM_OUT); | ||||
init_reg_param(®_params[1], "r5", 32, PARAM_OUT); | init_reg_param(®_params[1], "r5", 32, PARAM_OUT); | ||||
@@ -1920,7 +1917,6 @@ static int cfi_spansion_write_block(struct flash_bank *bank, const uint8_t *buff | |||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
} | } | ||||
; | |||||
init_reg_param(®_params[0], "r0", 32, PARAM_OUT); | init_reg_param(®_params[0], "r0", 32, PARAM_OUT); | ||||
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); | init_reg_param(®_params[1], "r1", 32, PARAM_OUT); | ||||
@@ -668,7 +668,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
ret = target_write_buffer(target, write_algorithm->address, | ret = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(efm32x_flash_write_code), efm32x_flash_write_code); | sizeof(efm32x_flash_write_code), efm32x_flash_write_code); | ||||
@@ -687,7 +687,7 @@ static int efm32x_write_block(struct flash_bank *bank, const uint8_t *buf, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | ||||
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (word-32bit) */ | init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (word-32bit) */ | ||||
@@ -502,7 +502,6 @@ static int em357_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
; | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(em357_flash_write_code), em357_flash_write_code); | sizeof(em357_flash_write_code), em357_flash_write_code); | ||||
@@ -1160,7 +1160,6 @@ static int lpc2900_write(struct flash_bank *bank, const uint8_t *buffer, | |||||
break; | break; | ||||
} | } | ||||
} | } | ||||
; | |||||
if (warea) { | if (warea) { | ||||
struct reg_param reg_params[5]; | struct reg_param reg_params[5]; | ||||
@@ -698,7 +698,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, | |||||
" a working area > %zdB in order to write to SPIFI flash.", | " a working area > %zdB in order to write to SPIFI flash.", | ||||
sizeof(lpcspifi_flash_write_code)); | sizeof(lpcspifi_flash_write_code)); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(lpcspifi_flash_write_code), | sizeof(lpcspifi_flash_write_code), | ||||
@@ -734,7 +734,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer, | |||||
if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) { | if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) { | ||||
target_free_working_area(target, write_algorithm); | target_free_working_area(target, write_algorithm); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | ||||
armv7m_info.core_mode = ARM_MODE_THREAD; | armv7m_info.core_mode = ARM_MODE_THREAD; | ||||
@@ -255,7 +255,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(mdr32fx_flash_write_code), mdr32fx_flash_write_code); | sizeof(mdr32fx_flash_write_code), mdr32fx_flash_write_code); | ||||
@@ -274,7 +274,7 @@ static int mdr_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | ||||
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (32bit) */ | init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (32bit) */ | ||||
@@ -680,7 +680,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, | |||||
" a working area > %zdB in order to write to SPIFI flash.", | " a working area > %zdB in order to write to SPIFI flash.", | ||||
sizeof(mrvlqspi_flash_write_code)); | sizeof(mrvlqspi_flash_write_code)); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(mrvlqspi_flash_write_code), | sizeof(mrvlqspi_flash_write_code), | ||||
@@ -714,7 +714,7 @@ static int mrvlqspi_flash_write(struct flash_bank *bank, const uint8_t *buffer, | |||||
if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) { | if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) { | ||||
target_free_working_area(target, write_algorithm); | target_free_working_area(target, write_algorithm); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | ||||
armv7m_info.core_mode = ARM_MODE_THREAD; | armv7m_info.core_mode = ARM_MODE_THREAD; | ||||
@@ -1299,7 +1299,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(niietcm4_flash_write_code), niietcm4_flash_write_code); | sizeof(niietcm4_flash_write_code), niietcm4_flash_write_code); | ||||
@@ -1319,7 +1319,7 @@ static int niietcm4_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* write_cmd base (in), status (out) */ | init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* write_cmd base (in), status (out) */ | ||||
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (128bit) */ | init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (128bit) */ | ||||
@@ -587,7 +587,7 @@ static int nrf51_protect(struct flash_bank *bank, int set, int first, int last) | |||||
if ((ppfc & 0xFF) == 0x00) { | if ((ppfc & 0xFF) == 0x00) { | ||||
LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings"); | LOG_ERROR("Code region 0 size was pre-programmed at the factory, can't change flash protection settings"); | ||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
}; | |||||
} | |||||
res = target_read_u32(chip->target, NRF51_UICR_CLENR0, | res = target_read_u32(chip->target, NRF51_UICR_CLENR0, | ||||
&clenr0); | &clenr0); | ||||
@@ -767,7 +767,7 @@ static int nrf51_erase_page(struct flash_bank *bank, | |||||
LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region"); | LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region"); | ||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
}; | |||||
} | |||||
res = nrf51_nvmc_generic_erase(chip, | res = nrf51_nvmc_generic_erase(chip, | ||||
NRF51_NVMC_ERASEUICR, | NRF51_NVMC_ERASEUICR, | ||||
@@ -1148,7 +1148,7 @@ COMMAND_HANDLER(nrf51_handle_mass_erase_command) | |||||
LOG_ERROR("Code region 0 size was pre-programmed at the factory, " | LOG_ERROR("Code region 0 size was pre-programmed at the factory, " | ||||
"mass erase command won't work."); | "mass erase command won't work."); | ||||
return ERROR_FAIL; | return ERROR_FAIL; | ||||
}; | |||||
} | |||||
res = nrf51_erase_all(chip); | res = nrf51_erase_all(chip); | ||||
if (res != ERROR_OK) { | if (res != ERROR_OK) { | ||||
@@ -430,7 +430,7 @@ static int pic32mx_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
/* Change values for counters and row size, depending on variant */ | /* Change values for counters and row size, depending on variant */ | ||||
if (pic32mx_info->dev_type == MX_1_2) { | if (pic32mx_info->dev_type == MX_1_2) { | ||||
@@ -221,7 +221,7 @@ static int psoc4_sysreq(struct target *target, uint8_t cmd, uint16_t cmd_param, | |||||
&sysreq_wait_algorithm) != ERROR_OK) { | &sysreq_wait_algorithm) != ERROR_OK) { | ||||
LOG_DEBUG("no working area for sysreq code"); | LOG_DEBUG("no working area for sysreq code"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
/* Write the code */ | /* Write the code */ | ||||
retval = target_write_buffer(target, | retval = target_write_buffer(target, | ||||
@@ -1065,7 +1065,7 @@ static int stellaris_write_block(struct flash_bank *bank, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_DEBUG("no working area for block memory writes"); | LOG_DEBUG("no working area for block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
/* plus a buffer big enough for this data */ | /* plus a buffer big enough for this data */ | ||||
if (wcount * 4 < buffer_size) | if (wcount * 4 < buffer_size) | ||||
@@ -1080,7 +1080,7 @@ static int stellaris_write_block(struct flash_bank *bank, | |||||
} | } | ||||
LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)", | LOG_DEBUG("retry target_alloc_working_area(%s, size=%u)", | ||||
target_name(target), (unsigned) buffer_size); | target_name(target), (unsigned) buffer_size); | ||||
}; | |||||
} | |||||
target_write_buffer(target, write_algorithm->address, | target_write_buffer(target, write_algorithm->address, | ||||
sizeof(stellaris_write_code), | sizeof(stellaris_write_code), | ||||
@@ -620,7 +620,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(stm32x_flash_write_code), stm32x_flash_write_code); | sizeof(stm32x_flash_write_code), stm32x_flash_write_code); | ||||
@@ -639,7 +639,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | init_reg_param(®_params[0], "r0", 32, PARAM_IN_OUT); /* flash base (in), status (out) */ | ||||
init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */ | init_reg_param(®_params[1], "r1", 32, PARAM_OUT); /* count (halfword-16bit) */ | ||||
@@ -551,7 +551,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(stm32x_flash_write_code), | sizeof(stm32x_flash_write_code), | ||||
@@ -570,7 +570,7 @@ static int stm32x_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | ||||
armv7m_info.core_mode = ARM_MODE_THREAD; | armv7m_info.core_mode = ARM_MODE_THREAD; | ||||
@@ -477,7 +477,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
retval = target_write_buffer(target, write_algorithm->address, | retval = target_write_buffer(target, write_algorithm->address, | ||||
sizeof(stm32l4_flash_write_code), | sizeof(stm32l4_flash_write_code), | ||||
@@ -497,7 +497,7 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
LOG_WARNING("no large enough working area available, can't do block memory writes"); | LOG_WARNING("no large enough working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
} | } | ||||
}; | |||||
} | |||||
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | armv7m_info.common_magic = ARMV7M_COMMON_MAGIC; | ||||
armv7m_info.core_mode = ARM_MODE_THREAD; | armv7m_info.core_mode = ARM_MODE_THREAD; | ||||
@@ -391,7 +391,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, const uint8_t *buff | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_DEBUG("no working area for block memory writes"); | LOG_DEBUG("no working area for block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
/* Write the flashing code */ | /* Write the flashing code */ | ||||
retval = target_write_buffer(target, | retval = target_write_buffer(target, | ||||
@@ -487,7 +487,7 @@ static int str7x_write_block(struct flash_bank *bank, const uint8_t *buffer, | |||||
if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code), | if (target_alloc_working_area_try(target, sizeof(str7x_flash_write_code), | ||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
uint8_t code[sizeof(str7x_flash_write_code)]; | uint8_t code[sizeof(str7x_flash_write_code)]; | ||||
target_buffer_set_u32_array(target, code, ARRAY_SIZE(str7x_flash_write_code), | target_buffer_set_u32_array(target, code, ARRAY_SIZE(str7x_flash_write_code), | ||||
@@ -390,7 +390,7 @@ static int str9x_write_block(struct flash_bank *bank, | |||||
&write_algorithm) != ERROR_OK) { | &write_algorithm) != ERROR_OK) { | ||||
LOG_WARNING("no working area available, can't do block memory writes"); | LOG_WARNING("no working area available, can't do block memory writes"); | ||||
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; | ||||
}; | |||||
} | |||||
uint8_t code[sizeof(str9x_flash_write_code)]; | uint8_t code[sizeof(str9x_flash_write_code)]; | ||||
target_buffer_set_u32_array(target, code, ARRAY_SIZE(str9x_flash_write_code), | target_buffer_set_u32_array(target, code, ARRAY_SIZE(str9x_flash_write_code), | ||||
@@ -471,7 +471,7 @@ if (openjtag_device_desc == NULL) { | |||||
LOG_ERROR("Can't set baud rate to max: %s", | LOG_ERROR("Can't set baud rate to max: %s", | ||||
ftdi_get_error_string(&ftdic)); | ftdi_get_error_string(&ftdic)); | ||||
return ERROR_JTAG_DEVICE_ERROR; | return ERROR_JTAG_DEVICE_ERROR; | ||||
}; | |||||
} | |||||
#endif | #endif | ||||
#if BUILD_OPENJTAG_FTD2XX == 1 | #if BUILD_OPENJTAG_FTD2XX == 1 | ||||
@@ -1003,12 +1003,12 @@ static int dsp5680xx_poll(struct target *target) | |||||
__func__); | __func__); | ||||
target->state = TARGET_UNKNOWN; | target->state = TARGET_UNKNOWN; | ||||
return ERROR_TARGET_FAILURE; | return ERROR_TARGET_FAILURE; | ||||
}; | |||||
} | |||||
if (target->state == TARGET_UNKNOWN) { | if (target->state == TARGET_UNKNOWN) { | ||||
LOG_ERROR("%s: Target status invalid - communication failure", | LOG_ERROR("%s: Target status invalid - communication failure", | ||||
__func__); | __func__); | ||||
return ERROR_TARGET_FAILURE; | return ERROR_TARGET_FAILURE; | ||||
}; | |||||
} | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -1573,7 +1573,6 @@ static int xscale_deassert_reset(struct target *target) | |||||
address += buf_cnt; | address += buf_cnt; | ||||
} | } | ||||
; | |||||
retval = xscale_load_ic(target, 0x0, | retval = xscale_load_ic(target, 0x0, | ||||
xscale->low_vectors); | xscale->low_vectors); | ||||