- added mips software breakpoint support

- changed some jtag LOG_DEBUG to only output when _DEBUG_JTAG_IO_ defined. Makes debugging other parts of openocd not as noisy
- updated correct jtag id for pic32mx

git-svn-id: svn://svn.berlios.de/openocd/trunk@1313 b42882b7-edfa-0310-969c-e2dbd0fdcd60

src/jtag/jtag.c

@@ -40,7 +40,6 @@
 */
 int jtag_error=ERROR_OK;
 
-
 typedef struct cmd_queue_page_s
 {
 	void *address;
@@ -1278,7 +1277,9 @@ int jtag_build_buffer(scan_command_t *cmd, u8 **buffer)
 
 	bit_count = 0;
 
+#ifdef _DEBUG_JTAG_IO_
 	LOG_DEBUG("num_fields: %i",cmd->num_fields);
+#endif
 
 	for (i = 0; i < cmd->num_fields; i++)
 	{
@@ -1295,7 +1296,9 @@ int jtag_build_buffer(scan_command_t *cmd, u8 **buffer)
 		}
 
 		bit_count += cmd->fields[i].num_bits;
+#ifdef _DEBUG_JTAG_IO_
 		LOG_DEBUG("bit_count totalling: %i",  bit_count );
+#endif
 	}
 
 	return bit_count;
@@ -2950,7 +2953,6 @@ void jtag_tap_handle_event( jtag_tap_t * tap, enum jtag_tap_event e)
 	}
 }
 
-
 /* map state number to SVF state string */
 const char* jtag_state_name(enum tap_state state)
 {
@@ -2979,4 +2981,3 @@ const char* jtag_state_name(enum tap_state state)
 
 	return ret;
 }
-

src/target/mips32.h

@@ -116,7 +116,11 @@ typedef struct mips32_core_reg_s
 #define MIPS32_SB(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SB, base, reg, off)
 #define MIPS32_SH(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SH, base, reg, off)
 #define MIPS32_SW(reg, off, base)	MIPS32_I_INST(MIPS32_OP_SW, base, reg, off)
+
+/* ejtag specific instructions */
 #define MIPS32_DRET					0x4200001F
+#define MIPS32_SDBBP				0x7000003F
+#define MIPS16_SDBBP 				0xE801
 
 extern int mips32_arch_state(struct target_s *target);
 extern int mips32_init_arch_info(target_t *target, mips32_common_t *mips32, jtag_tap_t *tap);

src/target/mips_m4k.c

@@ -490,7 +490,8 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
 	mips32_common_t *mips32 = target->arch_info;
 	mips32_comparator_t * comparator_list = mips32->inst_break_list;
-
+	int retval;
+	
 	if (breakpoint->set)
 	{
 		LOG_WARNING("breakpoint already set");
@@ -519,7 +520,54 @@ int mips_m4k_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 	}
 	else if (breakpoint->type == BKPT_SOFT)
 	{
-
+		if (breakpoint->length == 4)
+		{
+			u32 verify = 0xffffffff;
+			
+			if((retval = target->type->read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+			{
+				return retval;
+			}
+			if ((retval = target_write_u32(target, breakpoint->address, MIPS32_SDBBP)) != ERROR_OK)
+			{
+				return retval;
+			}
+			
+			if ((retval = target_read_u32(target, breakpoint->address, &verify)) != ERROR_OK)
+			{
+				return retval;
+			}
+			if (verify != MIPS32_SDBBP)
+			{
+				LOG_ERROR("Unable to set 32bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+				return ERROR_OK;
+			}
+		}
+		else
+		{
+			u16 verify = 0xffff;
+			
+			if((retval = target->type->read_memory(target, breakpoint->address, breakpoint->length, 1, breakpoint->orig_instr)) != ERROR_OK)
+			{
+				return retval;
+			}
+			if ((retval = target_write_u16(target, breakpoint->address, MIPS16_SDBBP)) != ERROR_OK)
+			{
+				return retval;
+			}
+			
+			if ((retval = target_read_u16(target, breakpoint->address, &verify)) != ERROR_OK)
+			{
+				return retval;
+			}
+			if (verify != MIPS16_SDBBP)
+			{
+				LOG_ERROR("Unable to set 16bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+				return ERROR_OK;
+			}
+		}
+		
+		breakpoint->set = 20; /* Any nice value but 0 */
 	}
 
 	return ERROR_OK;
@@ -530,7 +578,8 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 	/* get pointers to arch-specific information */
 	mips32_common_t *mips32 = target->arch_info;
 	mips32_comparator_t * comparator_list = mips32->inst_break_list;
-
+	int retval;
+	
 	if (!breakpoint->set)
 	{
 		LOG_WARNING("breakpoint not set");
@@ -551,7 +600,42 @@ int mips_m4k_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 	}
 	else
 	{
-
+		/* restore original instruction (kept in target endianness) */
+		if (breakpoint->length == 4)
+		{
+			u32 current_instr;
+			
+			/* check that user program has not modified breakpoint instruction */
+			if ((retval = target->type->read_memory(target, breakpoint->address, 4, 1, (u8*)&current_instr)) != ERROR_OK)
+			{
+				return retval;
+			}
+			if (current_instr == MIPS32_SDBBP)
+			{
+				if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+				{
+					return retval;
+				}
+			}
+		}
+		else
+		{
+			u16 current_instr;
+			
+			/* check that user program has not modified breakpoint instruction */
+			if ((retval = target->type->read_memory(target, breakpoint->address, 2, 1, (u8*)&current_instr)) != ERROR_OK)
+			{
+				return retval;
+			}
+			
+			if (current_instr == MIPS16_SDBBP)
+			{
+				if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+				{
+					return retval;
+				}
+			}
+		}
 	}
 	breakpoint->set = 0;
 
@@ -562,16 +646,17 @@ int mips_m4k_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
 {
 	mips32_common_t *mips32 = target->arch_info;
 
-	if (mips32->num_inst_bpoints_avail < 1)
+	if (breakpoint->type == BKPT_HARD)
 	{
-		LOG_INFO("no hardware breakpoint available");
-		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-	}
-
-	/* default to hardware for now */
-	breakpoint->type = BKPT_HARD;
+		if (mips32->num_inst_bpoints_avail < 1)
+		{
+			LOG_INFO("no hardware breakpoint available");
+			return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+		}
+		
+		mips32->num_inst_bpoints_avail--;
+	}	
 
-	mips32->num_inst_bpoints_avail--;
 	mips_m4k_set_breakpoint(target, breakpoint);
 
 	return ERROR_OK;

src/target/target/pic32mx.cfg

@@ -15,7 +15,7 @@ if { [info exists CPUTAPID ] } {
    set _CPUTAPID $CPUTAPID
 } else {
   # force an error till we get a good number
-   set _CPUTAPID 0xffffffff
+   set _CPUTAPID 0x30938053
 }
 
 jtag_nsrst_delay 100