Add support for ECP5 FPGA targets and board based on this chips: Radiona ULX3S and Lambdaconcept ECPIX-5 Change-Id: I932fc6e2458cda7d63ac21579acddea5b53410bc Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-on: https://review.openocd.org/c/openocd/+/6112 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>jim
@@ -24,6 +24,8 @@ ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6011", MODE="660", GROUP="plugdev", | |||||
# Original FT232H VID:PID | # Original FT232H VID:PID | ||||
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess" | ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6014", MODE="660", GROUP="plugdev", TAG+="uaccess" | ||||
# Original FT231XQ VID:PID | |||||
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="6015", MODE="660", GROUP="plugdev", TAG+="uaccess" | |||||
# DISTORTEC JTAG-lock-pick Tiny 2 | # DISTORTEC JTAG-lock-pick Tiny 2 | ||||
ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess" | ATTRS{idVendor}=="0403", ATTRS{idProduct}=="8220", MODE="660", GROUP="plugdev", TAG+="uaccess" | ||||
@@ -0,0 +1,27 @@ | |||||
# SPDX-License-Identifier: GPL-2.0-or-later | |||||
# | |||||
# LambdaConcept ECPIX-5 | |||||
# http://docs.lambdaconcept.com/ecpix-5/ | |||||
# Currently there are following board variants: | |||||
# ECPIX-5 45F - LFE5UM5G-45F | |||||
# ECPIX-5 85F - LFE5UM5G-85F | |||||
# | |||||
# This boards have two JTAG interfaces: | |||||
# - CN4, micro USB port connected to FT2232HQ chip: | |||||
# ADBUS0 TCK | |||||
# ADBUS1 TDI | |||||
# ADBUS2 TDO | |||||
# ADBUS3 TMS | |||||
# BDBUS0 UART_TXD | |||||
# BDBUS1 UART_RXD | |||||
# This interface should be used with following config: | |||||
# interface/ftdi/lambdaconcept_ecpix-5.cfg | |||||
# - CN3, 6 pin connector | |||||
# See schematics for more details: | |||||
# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF | |||||
# | |||||
# No reset lines are implemented. So it is not possible to remote reset the FPGA | |||||
# by using any of this interfaces | |||||
source [find interface/ftdi/lambdaconcept_ecpix-5.cfg] | |||||
source [find fpga/lattice_ecp5.cfg] |
@@ -0,0 +1,27 @@ | |||||
# SPDX-License-Identifier: GPL-2.0-or-later | |||||
# | |||||
# Radiona ULX3S | |||||
# https://radiona.org/ulx3s/ | |||||
# Currently there are following board variants: | |||||
# CS-ULX3S-01 - LFE5U 12F | |||||
# CS-ULX3S-02 - LFE5U 45F | |||||
# CS-ULX3S-03 - LFE5U 85F | |||||
# | |||||
# two JTAG interfaces: | |||||
# - US1, micro USB port connected to FT231XQ | |||||
# This interface should be used with following config: | |||||
# interface/ft232r/radiona_ulx3s.cfg | |||||
# - J4, 6 pin connector | |||||
# | |||||
# Both of this interfaces share the JTAG lines (TDI, TMS, TCK, TDO) between | |||||
# Lattice ECP5 FPGA chip and ESP32 WiFi controller. | |||||
# Note: TRST_N of the ESP32 is pulled up by default and can be pulled down over | |||||
# J3 interface. | |||||
# See schematics for more information: | |||||
# https://github.com/emard/ulx3s/blob/master/doc/schematics_v308.pdf | |||||
# https://github.com/emard/ulx3s/blob/master/doc/schematics_v314.pdf | |||||
# https://github.com/emard/ulx3s/blob/master/doc/schematics_v315.pdf | |||||
# https://github.com/emard/ulx3s/blob/master/doc/schematics_v316.pdf | |||||
source [find interface/ft232r/radiona_ulx3s.cfg] | |||||
source [find fpga/lattice_ecp5.cfg] |
@@ -0,0 +1,28 @@ | |||||
# SPDX-License-Identifier: GPL-2.0-or-later | |||||
if { [info exists CHIPNAME] } { | |||||
set _CHIPNAME $_CHIPNAME | |||||
} else { | |||||
set _CHIPNAME ecp5 | |||||
} | |||||
# Lattice ECP5 family | |||||
# TAP IDs are extracted from BSDL files found on this page: | |||||
# https://www.latticesemi.com/Products/FPGAandCPLD/ECP5 | |||||
# | |||||
# 0x01111043 - LAE5UM_25F/LFE5UM_25F | |||||
# 0x01112043 - LAE5UM_45F/LFE5UM_45F | |||||
# 0x01113043 - LAE5UM_85F/LFE5UM_85 | |||||
# 0x21111043 - LFE5U_12F | |||||
# 0x41111043 - LFE5U_25F | |||||
# 0x41112043 - LFE5U_45F | |||||
# 0x41113043 - LFE5U_85F | |||||
# 0x81111043 - LFE5UM5G-25 | |||||
# 0x81112043 - LFE5UM5G-45 | |||||
# 0x81113043 - LFE5UM5G-85 | |||||
jtag newtap $_CHIPNAME tap -irlen 8 -irmask 0x83 -ircapture 0x1 \ | |||||
-expected-id 0x01111043 -expected-id 0x01112043 -expected-id 0x01113043 \ | |||||
-expected-id 0x21111043 -expected-id 0x41111043 -expected-id 0x41112043 \ | |||||
-expected-id 0x41113043 -expected-id 0x81111043 -expected-id 0x81112043 \ | |||||
-expected-id 0x81113043 |
@@ -0,0 +1,16 @@ | |||||
# SPDX-License-Identifier: GPL-2.0-or-later | |||||
# | |||||
# This adapter is integrated in to Radiona ULX3S board: | |||||
# board/radiona_ulx3s.cfg | |||||
# See schematics for the ft232r layout: | |||||
# https://github.com/emard/ulx3s/blob/master/doc/schematics_v316.pdf | |||||
adapter driver ft232r | |||||
adapter speed 1000 | |||||
ft232r_vid_pid 0x0403 0x6015 | |||||
ft232r_tck_num DSR | |||||
ft232r_tms_num DCD | |||||
ft232r_tdi_num RI | |||||
ft232r_tdo_num CTS | |||||
ft232r_trst_num RTS | |||||
ft232r_srst_num DTR |
@@ -0,0 +1,14 @@ | |||||
# SPDX-License-Identifier: GPL-2.0-or-later | |||||
# | |||||
# This adapter is integrated in to LambdaConcept ECPIX-5 board: | |||||
# interface/ftdi/lambdaconcept_ecpix-5.cfg | |||||
# See schematics for the ftdi layout: | |||||
# http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF | |||||
adapter driver ftdi | |||||
adapter speed 10000 | |||||
ftdi_device_desc "Dual RS232-HS" | |||||
ftdi_vid_pid 0x0403 0x6010 | |||||
ftdi_layout_init 0xfff8 0xfffb | |||||
transport select jtag |