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- corrected str91x bank1 programming issues

- str91x protect_check fixed
- bank number now correctly given to str91x flash_config command


git-svn-id: svn://svn.berlios.de/openocd/trunk@211 b42882b7-edfa-0310-969c-e2dbd0fdcd60
tags/v0.1.0
ntfreak 15 years ago
parent
commit
89d0e422c9
3 changed files with 65 additions and 61 deletions
  1. +48
    -37
      src/flash/str9x.c
  2. +0
    -19
      src/flash/str9x.h
  3. +17
    -5
      src/flash/str9xpec.c

+ 48
- 37
src/flash/str9x.c View File

@@ -36,7 +36,7 @@
#include <string.h>
#include <unistd.h>

str9x_mem_layout_t mem_layout_str9[] = {
str9x_mem_layout_t mem_layout_str9bank0[] = {
{0x00000000, 0x10000, 0x01},
{0x00010000, 0x10000, 0x02},
{0x00020000, 0x10000, 0x04},
@@ -45,12 +45,17 @@ str9x_mem_layout_t mem_layout_str9[] = {
{0x00050000, 0x10000, 0x20},
{0x00060000, 0x10000, 0x40},
{0x00070000, 0x10000, 0x80},
{0x00080000, 0x02000, 0x100},
{0x00082000, 0x02000, 0x200},
{0x00084000, 0x02000, 0x400},
{0x00086000, 0x02000, 0x800}
};

str9x_mem_layout_t mem_layout_str9bank1[] = {
{0x00000000, 0x02000, 0x100},
{0x00002000, 0x02000, 0x200},
{0x00004000, 0x02000, 0x400},
{0x00006000, 0x02000, 0x800}
};

static u32 bank1start = 0x00080000;

int str9x_register_commands(struct command_context_s *cmd_ctx);
int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
int str9x_erase(struct flash_bank_s *bank, int first, int last);
@@ -93,22 +98,27 @@ int str9x_build_block_list(struct flash_bank_s *bank)
str9x_flash_bank_t *str9x_info = bank->driver_priv;
int i;
int num_sectors = 0, b0_sectors = 0;
int num_sectors = 0;
int b0_sectors = 0, b1_sectors = 0;
switch (bank->size)
{
case 256 * 1024:
case (256 * 1024):
b0_sectors = 4;
break;
case 512 * 1024:
case (512 * 1024):
b0_sectors = 8;
break;
case (32 * 1024):
b1_sectors = 4;
bank1start = bank->base;
break;
default:
ERROR("BUG: unknown bank->size encountered");
exit(-1);
}
num_sectors = b0_sectors + 4;
num_sectors = b0_sectors + b1_sectors;
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
@@ -118,20 +128,20 @@ int str9x_build_block_list(struct flash_bank_s *bank)
for (i = 0; i < b0_sectors; i++)
{
bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start;
bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size;
bank->sectors[num_sectors].offset = mem_layout_str9bank0[i].sector_start;
bank->sectors[num_sectors].size = mem_layout_str9bank0[i].sector_size;
bank->sectors[num_sectors].is_erased = -1;
bank->sectors[num_sectors].is_protected = 1;
str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit;
str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank0[i].sector_bit;
}
for (i = 8; i < 12; i++)
for (i = 0; i < b1_sectors; i++)
{
bank->sectors[num_sectors].offset = mem_layout_str9[i].sector_start;
bank->sectors[num_sectors].size = mem_layout_str9[i].sector_size;
bank->sectors[num_sectors].offset = mem_layout_str9bank1[i].sector_start;
bank->sectors[num_sectors].size = mem_layout_str9bank1[i].sector_size;
bank->sectors[num_sectors].is_erased = -1;
bank->sectors[num_sectors].is_protected = 1;
str9x_info->sector_bits[num_sectors++] = mem_layout_str9[i].sector_bit;
str9x_info->sector_bits[num_sectors++] = mem_layout_str9bank1[i].sector_bit;
}
return ERROR_OK;
@@ -152,12 +162,6 @@ int str9x_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char
str9x_info = malloc(sizeof(str9x_flash_bank_t));
bank->driver_priv = str9x_info;
if (bank->base != 0x00000000)
{
WARNING("overriding flash base address for STR91x device with 0x00000000");
bank->base = 0x00000000;
}

str9x_build_block_list(bank);
str9x_info->write_algorithm = NULL;
@@ -219,11 +223,11 @@ int str9x_protect_check(struct flash_bank_s *bank)

/* read level one protection */
adr = mem_layout_str9[10].sector_start + 4;
adr = bank1start + 0x10;
target_write_u32(target, adr, 0x90);
target_write_u16(target, adr, 0x90);
target_read_u16(target, adr, &status);
target_write_u32(target, adr, 0xFF);
target_write_u16(target, adr, 0xFF);
for (i = 0; i < bank->num_sectors; i++)
{
@@ -250,7 +254,7 @@ int str9x_erase(struct flash_bank_s *bank, int first, int last)
for (i = first; i <= last; i++)
{
adr = bank->sectors[i].offset;
adr = bank->base + bank->sectors[i].offset;
/* erase sectors */
target_write_u16(target, adr, 0x20);
@@ -301,7 +305,7 @@ int str9x_protect(struct flash_bank_s *bank, int set, int first, int last)
{
/* Level One Protection */
adr = bank->sectors[i].offset;
adr = bank->base + bank->sectors[i].offset;
target_write_u16(target, adr, 0x60);
if( set )
@@ -593,14 +597,21 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c
flash_bank_t *bank;
target_t *target = NULL;
if (argc < 4)
if (argc < 5)
{
command_print(cmd_ctx, "usage: str9x flash_config <bank> <bbsize> <nbsize> <bbstart> <nbstart>");
return ERROR_OK;
}
bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
if (!bank)
{
command_print(cmd_ctx, "usage: str9x flash_config <b0size> <b1size> <b0start> <b1start>");
command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
return ERROR_OK;
}
bank = get_flash_bank_by_num(0);
str9x_info = bank->driver_priv;
target = bank->target;
if (bank->target->state != TARGET_HALTED)
@@ -609,12 +620,12 @@ int str9x_handle_flash_config_command(struct command_context_s *cmd_ctx, char *c
}
/* config flash controller */
target_write_u32(target, FLASH_BBSR, strtoul(args[0], NULL, 0));
target_write_u32(target, FLASH_NBBSR, strtoul(args[1], NULL, 0));
target_write_u32(target, FLASH_BBADR, (strtoul(args[2], NULL, 0) >> 2));
target_write_u32(target, FLASH_NBBADR, (strtoul(args[3], NULL, 0) >> 2));
target_write_u32(target, FLASH_BBSR, strtoul(args[1], NULL, 0));
target_write_u32(target, FLASH_NBBSR, strtoul(args[2], NULL, 0));
target_write_u32(target, FLASH_BBADR, (strtoul(args[3], NULL, 0) >> 2));
target_write_u32(target, FLASH_NBBADR, (strtoul(args[4], NULL, 0) >> 2));

/* set b18 instruction TCM order as per flash programming manual */
/* set bit 18 instruction TCM order as per flash programming manual */
arm966e_write_cp15(target, 62, 0x40000);
/* enable flash bank 1 */


+ 0
- 19
src/flash/str9x.h View File

@@ -45,25 +45,6 @@ enum str9x_status_codes
STR9X_BUSY = 11
};

/* FMI sectors */

#define FMI_BANK_0 (0x5400000C << 2) /* FMI Bank 0 */
#define FMI_BANK_1 (0x54000010 << 2) /* FMI Bank 1 */

#define FMI_B0S0 (0x00000000 + FMI_BANK_0) /* Bank 0 sector 0 */
#define FMI_B0S1 (0x00010000 + FMI_BANK_0) /* Bank 0 sector 1 */
#define FMI_B0S2 (0x00020000 + FMI_BANK_0) /* Bank 0 sector 2 */
#define FMI_B0S3 (0x00030000 + FMI_BANK_0) /* Bank 0 sector 3 */
#define FMI_B0S4 (0x00040000 + FMI_BANK_0) /* Bank 0 sector 4 */
#define FMI_B0S5 (0x00050000 + FMI_BANK_0) /* Bank 0 sector 5 */
#define FMI_B0S6 (0x00060000 + FMI_BANK_0) /* Bank 0 sector 6 */
#define FMI_B0S7 (0x00070000 + FMI_BANK_0) /* Bank 0 sector 7 */

#define FMI_B1S0 (0x00000000 + FMI_BANK_1) /* Bank 1 sector 0 */
#define FMI_B1S1 (0x00002000 + FMI_BANK_1) /* Bank 1 sector 1 */
#define FMI_B1S2 (0x00004000 + FMI_BANK_1) /* Bank 1 sector 2 */
#define FMI_B1S3 (0x00006000 + FMI_BANK_1) /* Bank 1 sector 3 */

/* Flash registers */

#define FLASH_BBSR 0x54000000 /* Boot Bank Size Register */


+ 17
- 5
src/flash/str9xpec.c View File

@@ -125,6 +125,12 @@ int str9xpec_register_commands(struct command_context_s *cmd_ctx)
int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state)
{
jtag_device_t *device = jtag_get_device(chain_pos);
if (device == NULL)
{
DEBUG("Invalid Target");
return ERROR_TARGET_INVALID;
}
if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
{
@@ -154,7 +160,8 @@ u8 str9xpec_isc_status(int chain_pos)
scan_field_t field;
u8 status;
str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
if (str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI) != ERROR_OK)
return ISC_STATUS_ERROR;
field.device = chain_pos;
field.num_bits = 8;
@@ -189,7 +196,8 @@ int str9xpec_isc_enable(struct flash_bank_s *bank)
return ERROR_OK;
/* enter isc mode */
str9xpec_set_instr(chain_pos, ISC_ENABLE, TAP_RTI);
if (str9xpec_set_instr(chain_pos, ISC_ENABLE, TAP_RTI) != ERROR_OK)
return ERROR_TARGET_INVALID;
/* check ISC status */
status = str9xpec_isc_status(chain_pos);
@@ -214,7 +222,8 @@ int str9xpec_isc_disable(struct flash_bank_s *bank)
if (!str9xpec_info->isc_enable)
return ERROR_OK;
str9xpec_set_instr(chain_pos, ISC_DISABLE, TAP_RTI);
if (str9xpec_set_instr(chain_pos, ISC_DISABLE, TAP_RTI) != ERROR_OK)
return ERROR_TARGET_INVALID;
/* delay to handle aborts */
jtag_add_sleep(50);
@@ -273,10 +282,10 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
switch (bank->size)
{
case 256 * 1024:
case (256 * 1024):
b0_sectors = 4;
break;
case 512 * 1024:
case (512 * 1024):
b0_sectors = 8;
break;
default:
@@ -284,7 +293,9 @@ int str9xpec_build_block_list(struct flash_bank_s *bank)
exit(-1);
}
/* include bank 1 sectors */
num_sectors = b0_sectors + 4;
bank->size += (32 * 1024);
bank->num_sectors = num_sectors;
bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
@@ -1327,6 +1338,7 @@ int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ct
if( str9xpec_info->devarm ) {
dev0->next = str9xpec_info->devarm;
jtag_num_devices++;
str9xpec_info->devarm = NULL;
}
return ERROR_OK;


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