Browse Source

jtag newtap change & huge manual update

git-svn-id: svn://svn.berlios.de/openocd/trunk@1194 b42882b7-edfa-0310-969c-e2dbd0fdcd60
tags/v0.1.0
duane 12 years ago
parent
commit
a28eaa85f7
99 changed files with 5010 additions and 1972 deletions
  1. +137
    -0
      NEWTAPS
  2. +2482
    -1129
      doc/openocd.texi
  3. +104
    -90
      src/flash/str9xpec.c
  4. +1
    -1
      src/flash/str9xpec.h
  5. +2
    -0
      src/helper/types.h
  6. +608
    -178
      src/jtag/jtag.c
  7. +30
    -11
      src/jtag/jtag.h
  8. +26
    -20
      src/pld/virtex2.c
  9. +2
    -1
      src/pld/virtex2.h
  10. +9
    -24
      src/target/Makefile.am
  11. +20
    -21
      src/target/arm11.c
  12. +9
    -8
      src/target/arm11_dbgtap.c
  13. +5
    -5
      src/target/arm720t.c
  14. +3
    -2
      src/target/arm7_9_common.c
  15. +10
    -10
      src/target/arm7tdmi.c
  16. +1
    -1
      src/target/arm7tdmi.h
  17. +15
    -15
      src/target/arm920t.c
  18. +11
    -11
      src/target/arm926ejs.c
  19. +1
    -1
      src/target/arm926ejs.h
  20. +9
    -9
      src/target/arm966e.c
  21. +15
    -15
      src/target/arm9tdmi.c
  22. +1
    -1
      src/target/arm9tdmi.h
  23. +7
    -6
      src/target/arm_jtag.c
  24. +1
    -1
      src/target/arm_jtag.h
  25. +10
    -0
      src/target/board/arm_evaluator7t.cfg
  26. +78
    -0
      src/target/board/at91rm9200-dk.cfg
  27. +4
    -16
      src/target/board/eir.cfg
  28. +2
    -13
      src/target/board/hammer.cfg
  29. +3
    -0
      src/target/board/iar_str912_sk.cfg
  30. +12
    -0
      src/target/board/logicpd_imx27.cfg
  31. +4
    -0
      src/target/board/olimex_sam7_ex256.cfg
  32. +3
    -0
      src/target/board/stm3210e_eval.cfg
  33. +6
    -0
      src/target/board/stm32f10x_128k_eval.cfg
  34. +3
    -3
      src/target/cortex_m3.c
  35. +1
    -1
      src/target/cortex_m3.h
  36. +6
    -6
      src/target/cortex_swjdp.c
  37. +15
    -15
      src/target/embeddedice.c
  38. +3
    -3
      src/target/embeddedice.h
  39. +22
    -21
      src/target/etb.c
  40. +1
    -1
      src/target/etb.h
  41. +6
    -6
      src/target/etm.c
  42. +4
    -4
      src/target/feroceon.c
  43. +2
    -2
      src/target/mips32.c
  44. +1
    -1
      src/target/mips32.h
  45. +13
    -11
      src/target/mips_ejtag.c
  46. +1
    -1
      src/target/mips_ejtag.h
  47. +3
    -3
      src/target/mips_m4k.c
  48. +16
    -12
      src/target/target.c
  49. +1
    -1
      src/target/target.h
  50. +26
    -10
      src/target/target/aduc702x.cfg
  51. +25
    -4
      src/target/target/at91eb40a.cfg
  52. +26
    -5
      src/target/target/at91r40008.cfg
  53. +51
    -0
      src/target/target/at91rm9200.cfg
  54. +7
    -12
      src/target/target/at91sam9260.cfg
  55. +26
    -3
      src/target/target/at91sam9260minimal.cfg
  56. +23
    -2
      src/target/target/epc9301.cfg
  57. +27
    -5
      src/target/target/imote2.cfg
  58. +37
    -7
      src/target/target/imx27.cfg
  59. +56
    -10
      src/target/target/imx31.cfg
  60. +26
    -3
      src/target/target/ipx42x.cfg
  61. +36
    -7
      src/target/target/is5114.cfg
  62. +25
    -4
      src/target/target/lm3s3748.cfg
  63. +26
    -4
      src/target/target/lm3s6965.cfg
  64. +24
    -4
      src/target/target/lm3s811.cfg
  65. +29
    -5
      src/target/target/lpc2129.cfg
  66. +25
    -4
      src/target/target/lpc2148.cfg
  67. +1
    -0
      src/target/target/lpc2148_2mhz.cfg
  68. +1
    -0
      src/target/target/lpc2148_rclk.cfg
  69. +23
    -4
      src/target/target/lpc2294.cfg
  70. +28
    -4
      src/target/target/netx500.cfg
  71. +5
    -19
      src/target/target/nslu2.cfg
  72. +28
    -7
      src/target/target/omap5912.cfg
  73. +25
    -5
      src/target/target/pic32mx.cfg
  74. +24
    -4
      src/target/target/pxa255.cfg
  75. +3
    -2
      src/target/target/pxa255_sst.cfg
  76. +29
    -5
      src/target/target/pxa270.cfg
  77. +26
    -4
      src/target/target/s3c2440.cfg
  78. +38
    -0
      src/target/target/sam7se512.cfg
  79. +24
    -6
      src/target/target/sam7x256.cfg
  80. +35
    -0
      src/target/target/samsung_s2c2410.cfg
  81. +25
    -0
      src/target/target/samsung_s3c4510.cfg
  82. +49
    -0
      src/target/target/samsung_s3c6410.cfg
  83. +26
    -0
      src/target/target/sharp_lh79532.cfg
  84. +1
    -13
      src/target/target/smdk6410.cfg
  85. +40
    -7
      src/target/target/stm32.cfg
  86. +31
    -7
      src/target/target/stm32stick.cfg
  87. +26
    -7
      src/target/target/str710.cfg
  88. +26
    -9
      src/target/target/str730.cfg
  89. +27
    -8
      src/target/target/str750.cfg
  90. +36
    -5
      src/target/target/str910-eval.cfg
  91. +41
    -12
      src/target/target/str912.cfg
  92. +29
    -6
      src/target/target/str9comstick.cfg
  93. +5
    -3
      src/target/target/test_reset_syntax_error.cfg
  94. +27
    -5
      src/target/target/wi-9c.cfg
  95. +25
    -5
      src/target/target/xba_revA3.cfg
  96. +25
    -5
      src/target/target/zy1000.cfg
  97. +39
    -40
      src/target/xscale.c
  98. +1
    -1
      src/target/xscale.h
  99. +17
    -10
      src/xsvf/xsvf.c

+ 137
- 0
NEWTAPS View File

@@ -0,0 +1,137 @@
Reporting Unknown JTAG TAP IDS
------------------------------

If OpenOCD reports an UNKNOWN or Unexpected Tap ID please report it to
the development mailing list - However - keep reading.

openocd-development@lists.berlios.de.

========================================

About "UNEXPECTED" tap ids.

Before reporting an "UNEXPECTED TAP ID" - take a closer look.
Perhaps you have your OpenOCD configured the wrong way, maybe you
have the tap configured the wrong way? Or something else is wrong.
(Remember: OpenOCD does not stop if the tap is not present)

This "tap id check" is there for a purpose.
The goal is to help get the *right* configuration.

The idea is this:

Every JTAG tap is suppose to have "a unique 32bit tap id" number.
They are suppose to be "sort of unique" but they are not. There are
no guarantees.

Version Number Changes:

Sometimes, the tap ID only differs by VERSION number. If so - it's
not a big deal. Please do report this information. We'd like to
know about it.

For example

Error: ERROR: Tap: s3c4510.cpu - Expected id: 0x3f0f0f0f, Got: 0x1f0f0f0f
Error: ERROR: expected: mfg: 0x787, part: 0xf0f0, ver: 0x3
Error: ERROR: got: mfg: 0x787, part: 0xf0f0, ver: 0x1

========================================

Updating the Tap ID number your self
Why do this? You just want the warning to go away. And don't want
to update your version/instance of OpenOCD.

On simple systems, to fix this problem, in your "openocd.cfg" file,
override the tap id. Depending on the tap, add one of these 3
commands:

set CPUTAPID newvalue
or set BSTAPID newvalue
or set FLASHTAPID newvalue
or set ETMTAPID newvalue

Where "newvalue" is the new value you are seeing.

On complex systems, (with many taps and chips) you probably have a
custom configuration file. Its is more complicated, you're going to
have to read through the configuration files

========================================

What to send:

Cut & paste the output of OpenOCD that pointed you at this file.

Please include the VERSION number of OpenOCD you are using.

And please include the information below.

========================================

A) The JTAG TAP ID code.

This is always a 32bit hex number.

Examples:
0x1f0f0f0f - is an old ARM7TDMI
0x3f0f0f0f - is a newer ARM7TDMI
0x3ba00477 - is an ARM cortex M3

Some chips have multiple JTAG taps - be sure to list
each one individually - ORDER is important!

========================================
B) The maker of the part

Examples:
Xilinx, Atmel, ST Micro Systems, Freescale

========================================
C) The family of parts it belongs to

Examples:
"NXP LPC Series"
"Atmel SAM7 Series"
========================================

D) The actual part number on the package

For example: "S3C45101x01"

========================================

E) What type of board it is.

ie: a "commercial off the self eval board" that one can purchase (as
opposed to your private internal custom board)

For example: ST Micro systems has Eval boards, so does Analog Devices

Or - if it is inside something "hackers like to hack" that information
is helpful too.

For example: A consumer GPS unit or a cellphone

========================================

(F) The maker of the board
ie: Olimex, LogicPD, Freescale(eval board)

========================================
(G) Identifying information on the board.

Not good: "iar red ST eval board"

Really good: "IAR STR912-SK evaluation board"

========================================

(H) Are there other interesting (JTAG) chips on the board?

ie: An FPGA or CPLD ...

========================================

+ 2482
- 1129
doc/openocd.texi
File diff suppressed because it is too large
View File


+ 104
- 90
src/flash/str9xpec.c View File

@@ -111,20 +111,18 @@ int str9xpec_register_commands(struct command_context_s *cmd_ctx)
return ERROR_OK;
}

int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state)
int str9xpec_set_instr(jtag_tap_t *tap, u32 new_instr, enum tap_state end_state)
{
jtag_device_t *device = jtag_get_device(chain_pos);
if (device == NULL)
{
if( tap == NULL ){
return ERROR_TARGET_INVALID;
}

if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
{
scan_field_t field;

field.device = chain_pos;
field.num_bits = device->ir_length;
field.tap = tap;
field.num_bits = tap->ir_length;
field.out_value = calloc(CEIL(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.out_mask = NULL;
@@ -142,15 +140,15 @@ int str9xpec_set_instr(int chain_pos, u32 new_instr, enum tap_state end_state)
return ERROR_OK;
}

u8 str9xpec_isc_status(int chain_pos)
u8 str9xpec_isc_status(jtag_tap_t *tap)
{
scan_field_t field;
u8 status;

if (str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI) != ERROR_OK)
if (str9xpec_set_instr(tap, ISC_NOOP, TAP_PI) != ERROR_OK)
return ISC_STATUS_ERROR;

field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.out_mask = NULL;
@@ -174,20 +172,20 @@ u8 str9xpec_isc_status(int chain_pos)
int str9xpec_isc_enable(struct flash_bank_s *bank)
{
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (str9xpec_info->isc_enable)
return ERROR_OK;

/* enter isc mode */
if (str9xpec_set_instr(chain_pos, ISC_ENABLE, TAP_RTI) != ERROR_OK)
if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_RTI) != ERROR_OK)
return ERROR_TARGET_INVALID;

/* check ISC status */
status = str9xpec_isc_status(chain_pos);
status = str9xpec_isc_status(tap);
if (status & ISC_STATUS_MODE)
{
/* we have entered isc mode */
@@ -201,22 +199,22 @@ int str9xpec_isc_enable(struct flash_bank_s *bank)
int str9xpec_isc_disable(struct flash_bank_s *bank)
{
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (!str9xpec_info->isc_enable)
return ERROR_OK;

if (str9xpec_set_instr(chain_pos, ISC_DISABLE, TAP_RTI) != ERROR_OK)
if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_RTI) != ERROR_OK)
return ERROR_TARGET_INVALID;

/* delay to handle aborts */
jtag_add_sleep(50);

/* check ISC status */
status = str9xpec_isc_status(chain_pos);
status = str9xpec_isc_status(tap);
if (!(status & ISC_STATUS_MODE))
{
/* we have left isc mode */
@@ -231,18 +229,18 @@ int str9xpec_read_config(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
u32 chain_pos;
jtag_tap_t *tap;

str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

LOG_DEBUG("ISC_CONFIGURATION");

/* execute ISC_CONFIGURATION command */
str9xpec_set_instr(chain_pos, ISC_CONFIGURATION, TAP_PI);
str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.out_mask = NULL;
@@ -255,7 +253,7 @@ int str9xpec_read_config(struct flash_bank_s *bank)
jtag_add_dr_scan(1, &field, TAP_RTI);
jtag_execute_queue();

status = str9xpec_isc_status(chain_pos);
status = str9xpec_isc_status(tap);

return status;
}
@@ -352,9 +350,11 @@ int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch
arm7_9 = armv4_5->arch_info;
jtag_info = &arm7_9->jtag_info;

str9xpec_info->chain_pos = (jtag_info->chain_pos - 1);

str9xpec_info->tap = jtag_TapByAbsPosition( jtag_info->tap->abs_chain_position - 1);
str9xpec_info->isc_enable = 0;
str9xpec_info->devarm = NULL;

str9xpec_build_block_list(bank);

@@ -368,13 +368,13 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
{
scan_field_t field;
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
int i;
u8 *buffer = NULL;

str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (!str9xpec_info->isc_enable) {
str9xpec_isc_enable( bank );
@@ -393,9 +393,9 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
}

/* execute ISC_BLANK_CHECK command */
str9xpec_set_instr(chain_pos, ISC_BLANK_CHECK, TAP_PI);
str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.out_mask = NULL;
@@ -409,7 +409,7 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
jtag_add_sleep(40000);

/* read blank check result */
field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.out_mask = NULL;
@@ -422,7 +422,7 @@ int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
jtag_add_dr_scan(1, &field, TAP_PI);
jtag_execute_queue();

status = str9xpec_isc_status(chain_pos);
status = str9xpec_isc_status(tap);

for (i = first; i <= last; i++)
{
@@ -467,13 +467,13 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
{
scan_field_t field;
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
int i;
u8 *buffer = NULL;

str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (!str9xpec_info->isc_enable) {
str9xpec_isc_enable( bank );
@@ -509,9 +509,9 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
LOG_DEBUG("ISC_ERASE");

/* execute ISC_ERASE command */
str9xpec_set_instr(chain_pos, ISC_ERASE, TAP_PI);
str9xpec_set_instr(tap, ISC_ERASE, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.out_mask = NULL;
@@ -527,7 +527,7 @@ int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
jtag_add_sleep(10);

/* wait for erase completion */
while (!((status = str9xpec_isc_status(chain_pos)) & ISC_STATUS_BUSY)) {
while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
alive_sleep(1);
}

@@ -554,11 +554,11 @@ int str9xpec_lock_device(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
str9xpec_flash_controller_t *str9xpec_info = NULL;

str9xpec_info = bank->driver_priv;
chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (!str9xpec_info->isc_enable) {
str9xpec_isc_enable( bank );
@@ -572,12 +572,12 @@ int str9xpec_lock_device(struct flash_bank_s *bank)
str9xpec_set_address(bank, 0x80);

/* execute ISC_PROGRAM command */
str9xpec_set_instr(chain_pos, ISC_PROGRAM_SECURITY, TAP_RTI);
str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_RTI);

str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
str9xpec_set_instr(tap, ISC_NOOP, TAP_PI);

do {
field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.out_mask = NULL;
@@ -654,16 +654,16 @@ int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)

int str9xpec_set_address(struct flash_bank_s *bank, u8 sector)
{
u32 chain_pos;
jtag_tap_t *tap;
scan_field_t field;
str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

/* set flash controller address */
str9xpec_set_instr(chain_pos, ISC_ADDRESS_SHIFT, TAP_PI);
str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = &sector;
field.out_mask = NULL;
@@ -686,14 +686,14 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
u32 bytes_written = 0;
u8 status;
u32 check_address = offset;
u32 chain_pos;
jtag_tap_t *tap;
scan_field_t field;
u8 *scanbuf;
int i;
u32 first_sector = 0;
u32 last_sector = 0;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

if (!str9xpec_info->isc_enable) {
str9xpec_isc_enable(bank);
@@ -750,9 +750,9 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)

while (dwords_remaining > 0)
{
str9xpec_set_instr(chain_pos, ISC_PROGRAM, TAP_PI);
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = (buffer + bytes_written);
field.out_mask = NULL;
@@ -767,10 +767,10 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* small delay before polling */
jtag_add_sleep(50);

str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
str9xpec_set_instr(tap, ISC_NOOP, TAP_PI);

do {
field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.out_mask = NULL;
@@ -810,9 +810,9 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
bytes_written++;
}

str9xpec_set_instr(chain_pos, ISC_PROGRAM, TAP_PI);
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = last_dword;
field.out_mask = NULL;
@@ -827,10 +827,10 @@ int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
/* small delay before polling */
jtag_add_sleep(50);

str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
str9xpec_set_instr(tap, ISC_NOOP, TAP_PI);

do {
field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.out_mask = NULL;
@@ -871,7 +871,7 @@ int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd
flash_bank_t *bank;
scan_field_t field;
u8 *buffer = NULL;
u32 chain_pos;
jtag_tap_t *tap;
u32 idcode;
str9xpec_flash_controller_t *str9xpec_info = NULL;

@@ -888,13 +888,13 @@ int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd
}

str9xpec_info = bank->driver_priv;
chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

buffer = calloc(CEIL(32, 8), 1);

str9xpec_set_instr(chain_pos, ISC_IDCODE, TAP_PI);
str9xpec_set_instr(tap, ISC_IDCODE, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 32;
field.out_value = NULL;
field.out_mask = NULL;
@@ -990,11 +990,11 @@ int str9xpec_write_options(struct flash_bank_s *bank)
{
scan_field_t field;
u8 status;
u32 chain_pos;
jtag_tap_t *tap;
str9xpec_flash_controller_t *str9xpec_info = NULL;

str9xpec_info = bank->driver_priv;
chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

/* erase config options first */
status = str9xpec_erase_area( bank, 0xFE, 0xFE );
@@ -1017,9 +1017,9 @@ int str9xpec_write_options(struct flash_bank_s *bank)
str9xpec_set_address(bank, 0x50);

/* execute ISC_PROGRAM command */
str9xpec_set_instr(chain_pos, ISC_PROGRAM, TAP_PI);
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_PI);

field.device = chain_pos;
field.tap = tap;
field.num_bits = 64;
field.out_value = str9xpec_info->options;
field.out_mask = NULL;
@@ -1034,10 +1034,10 @@ int str9xpec_write_options(struct flash_bank_s *bank)
/* small delay before polling */
jtag_add_sleep(50);

str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_PI);
str9xpec_set_instr(tap, ISC_NOOP, TAP_PI);

do {
field.device = chain_pos;
field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.out_mask = NULL;
@@ -1265,11 +1265,16 @@ int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char

int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
#if 1
command_print( cmd_ctx, "**STR9FLASH is currently broken :-( **");
return ERROR_OK;
#else
int retval;
flash_bank_t *bank;
u32 chain_pos;
jtag_device_t* dev0;
jtag_device_t* dev2;
jtag_tap_t *tapX;
jtag_tap_t *tap0;
jtag_tap_t *tap1;
jtag_tap_t *tap2;
str9xpec_flash_controller_t *str9xpec_info = NULL;

if (argc < 1)
@@ -1287,33 +1292,46 @@ int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx

str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tapX = str9xpec_info->tap;

/* remove arm core from chain - enter turbo mode */
//
// At postion +2 in the chain,
// I do not think this is right..
// I have not tested it...
// and it is a bit wacky right now.
// -- Duane 25/nov/2008
tap0 = tapX;
tap1 = tap0->next_tap;
if( tap1 == NULL ){
// things are *WRONG*
command_print(cmd_ctx,"**STR9FLASH** (tap1) invalid chain?");
return ERROR_OK;
}
tap2 = tap1->next_tap;
if( tap2 == NULL ){
// things are *WRONG*
command_print(cmd_ctx,"**STR9FLASH** (tap2) invalid chain?");
return ERROR_OK;
}

str9xpec_set_instr(chain_pos+2, 0xD, TAP_RTI);
// this instruction disables the arm9 tap
str9xpec_set_instr(tap2, 0xD, TAP_RTI);
if ((retval=jtag_execute_queue())!=ERROR_OK)
return retval;

/* modify scan chain - str9 core has been removed */
dev0 = jtag_get_device(chain_pos);
if (dev0 == NULL)
return ERROR_FAIL;
str9xpec_info->devarm = jtag_get_device(chain_pos+1);
dev2 = jtag_get_device(chain_pos+2);
if (dev2 == NULL)
return ERROR_FAIL;
dev0->next = dev2;
jtag_num_devices--;
str9xpec_info->devarm = tap1;
tap1->enabled = 0;

return ERROR_OK;
#endif
}

int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
{
flash_bank_t *bank;
u32 chain_pos;
jtag_device_t* dev0;
jtag_tap_t *tap;
str9xpec_flash_controller_t *str9xpec_info = NULL;

if (argc < 1)
@@ -1331,22 +1349,18 @@ int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ct

str9xpec_info = bank->driver_priv;

chain_pos = str9xpec_info->chain_pos;
tap = str9xpec_info->tap;

dev0 = jtag_get_device(chain_pos);
if (dev0 == NULL)
if (tap == NULL)
return ERROR_FAIL;


/* exit turbo mode via TLR */
str9xpec_set_instr(chain_pos, ISC_NOOP, TAP_TLR);
str9xpec_set_instr(tap, ISC_NOOP, TAP_TLR);
jtag_execute_queue();

/* restore previous scan chain */
if( str9xpec_info->devarm ) {
dev0->next = str9xpec_info->devarm;
jtag_num_devices++;
str9xpec_info->devarm = NULL;
if( tap->next_tap ){
tap->next_tap->enabled = 1;
}

return ERROR_OK;


+ 1
- 1
src/flash/str9xpec.h View File

@@ -29,10 +29,10 @@

typedef struct str9xpec_flash_controller_s
{
jtag_tap_t *tap;
u32 *sector_bits;
int chain_pos;
int isc_enable;
jtag_device_t* devarm;
u8 options[8];
} str9xpec_flash_controller_t;



+ 2
- 0
src/helper/types.h View File

@@ -44,6 +44,8 @@ typedef unsigned long long u64;
#endif


typedef struct jtag_tap_s jtag_tap_t;


/* DANGER!!!! here be dragons! Note that the pointer in
* memory might be unaligned. On some CPU's, i.e. ARM7,


+ 608
- 178
src/jtag/jtag.c
File diff suppressed because it is too large
View File


+ 30
- 11
src/jtag/jtag.h View File

@@ -75,7 +75,7 @@ typedef int (*in_handler_t)(u8 *in_value, void *priv, struct scan_field_s *field

typedef struct scan_field_s
{
int device; /* ordinal device number this instruction refers to */
jtag_tap_t *tap; /* tap pointer this instruction refers to */
int num_bits; /* number of bits this field specifies (up to 32) */
u8 *out_value; /* value to be scanned into the device */
u8 *out_mask; /* only masked bits care */
@@ -163,20 +163,39 @@ typedef struct jtag_command_s

extern jtag_command_t *jtag_command_queue;

typedef struct jtag_device_s
// this is really: typedef jtag_tap_t
// But - the typedef is done in "types.h"
// due to "forward decloration reasons"
struct jtag_tap_s
{
const char *chip;
const char *tapname;
const char *dotted_name;
int abs_chain_position;
int enabled;
int ir_length; /* size of instruction register */
u32 ir_capture_value;
u8 *expected; /* Capture-IR expected value */
u32 ir_capture_mask;
u8 *expected_mask; /* Capture-IR expected mask */
u32 idcode; /* device identification code */
u32 expected_id;
u8 *cur_instr; /* current instruction */
int bypass; /* bypass register selected */
struct jtag_device_s *next;
} jtag_device_t;
jtag_tap_t *next_tap;
};
extern jtag_tap_t *jtag_AllTaps(void);
extern jtag_tap_t *jtag_TapByPosition(int n);
extern jtag_tap_t *jtag_NextEnabledTap( jtag_tap_t * );
extern jtag_tap_t *jtag_TapByPosition( int n );
extern jtag_tap_t *jtag_TapByString( const char *dotted_name );
extern jtag_tap_t *jtag_TapByJimObj( Jim_Interp *interp, Jim_Obj *obj );
extern jtag_tap_t *jtag_TapByAbsPosition( int abs_position );
extern int jtag_NumEnabledTaps(void);
extern int jtag_NumTotalTaps(void);



extern jtag_device_t *jtag_devices;
extern int jtag_num_devices;
extern int jtag_ir_scan_size;

enum reset_line_mode
{
@@ -420,7 +439,7 @@ extern enum scan_type jtag_scan_type(scan_command_t *cmd);
extern int jtag_scan_size(scan_command_t *cmd);
extern int jtag_read_buffer(u8 *buffer, scan_command_t *cmd);
extern int jtag_build_buffer(scan_command_t *cmd, u8 **buffer);
extern jtag_device_t* jtag_get_device(int num);
extern void jtag_sleep(u32 us);
extern int jtag_call_event_callbacks(enum jtag_event event);
extern int jtag_register_event_callback(int (*callback)(enum jtag_event event, void *priv), void *priv);
@@ -463,7 +482,7 @@ extern int jtag_verify_capture_ir;
*
* Note that this jtag_add_dr_out can be defined as an inline function.
*/
extern void interface_jtag_add_dr_out(int device,
extern void interface_jtag_add_dr_out(jtag_tap_t *tap,
int num_fields,
const int *num_bits,
const u32 *value,
@@ -473,7 +492,7 @@ extern void interface_jtag_add_dr_out(int device,



static __inline__ void jtag_add_dr_out(int device,
static __inline__ void jtag_add_dr_out(jtag_tap_t *tap,
int num_fields,
const int *num_bits,
const u32 *value,
@@ -482,7 +501,7 @@ static __inline__ void jtag_add_dr_out(int device,
if (end_state != -1)
cmd_queue_end_state=end_state;
cmd_queue_cur_state=cmd_queue_end_state;
interface_jtag_add_dr_out(device, num_fields, num_bits, value, cmd_queue_end_state);
interface_jtag_add_dr_out(tap, num_fields, num_bits, value, cmd_queue_end_state);
}




+ 26
- 20
src/pld/virtex2.c View File

@@ -43,18 +43,17 @@ pld_driver_t virtex2_pld =
.load = virtex2_load,
};

int virtex2_set_instr(int chain_pos, u32 new_instr)
int virtex2_set_instr(jtag_tap_t *tap, u32 new_instr)
{
jtag_device_t *device = jtag_get_device(chain_pos);
if (device==NULL)
if (tap==NULL)
return ERROR_FAIL;

if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
{
scan_field_t field;

field.device = chain_pos;
field.num_bits = device->ir_length;
field.tap = tap;
field.num_bits = tap->ir_length;
field.out_value = calloc(CEIL(field.num_bits, 8), 1);
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.out_mask = NULL;
@@ -81,7 +80,7 @@ int virtex2_send_32(struct pld_device_s *pld_device, int num_words, u32 *words)

values = malloc(num_words * 4);

scan_field.device = virtex2_info->chain_pos;
scan_field.tap = virtex2_info->tap;
scan_field.num_bits = num_words * 32;
scan_field.out_value = values;
scan_field.out_mask = NULL;
@@ -94,7 +93,7 @@ int virtex2_send_32(struct pld_device_s *pld_device, int num_words, u32 *words)
for (i = 0; i < num_words; i++)
buf_set_u32(values + 4 * i, 0, 32, flip_u32(*words++, 32));

virtex2_set_instr(virtex2_info->chain_pos, 0x5); /* CFG_IN */
virtex2_set_instr(virtex2_info->tap, 0x5); /* CFG_IN */

jtag_add_dr_scan(1, &scan_field, TAP_PD);

@@ -115,7 +114,7 @@ int virtex2_receive_32(struct pld_device_s *pld_device, int num_words, u32 *word
virtex2_pld_device_t *virtex2_info = pld_device->driver_priv;
scan_field_t scan_field;

scan_field.device = virtex2_info->chain_pos;
scan_field.tap = virtex2_info->tap;
scan_field.num_bits = 32;
scan_field.out_value = NULL;
scan_field.out_mask = NULL;
@@ -124,7 +123,7 @@ int virtex2_receive_32(struct pld_device_s *pld_device, int num_words, u32 *word
scan_field.in_check_mask = NULL;
scan_field.in_handler = virtex2_jtag_buf_to_u32;

virtex2_set_instr(virtex2_info->chain_pos, 0x4); /* CFG_OUT */
virtex2_set_instr(virtex2_info->tap, 0x4); /* CFG_OUT */

while (num_words--)
{
@@ -166,7 +165,7 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)

scan_field_t field;

field.device = virtex2_info->chain_pos;
field.tap = virtex2_info->tap;
field.out_mask = NULL;
field.in_value = NULL;
field.in_check_value = NULL;
@@ -178,11 +177,11 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)
return retval;

jtag_add_end_state(TAP_RTI);
virtex2_set_instr(virtex2_info->chain_pos, 0xb); /* JPROG_B */
virtex2_set_instr(virtex2_info->tap, 0xb); /* JPROG_B */
jtag_execute_queue();
jtag_add_sleep(1000);

virtex2_set_instr(virtex2_info->chain_pos, 0x5); /* CFG_IN */
virtex2_set_instr(virtex2_info->tap, 0x5); /* CFG_IN */
jtag_execute_queue();

for (i = 0; i < bit_file.length; i++)
@@ -197,13 +196,13 @@ int virtex2_load(struct pld_device_s *pld_device, char *filename)
jtag_add_tlr();

jtag_add_end_state(TAP_RTI);
virtex2_set_instr(virtex2_info->chain_pos, 0xc); /* JSTART */
virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
jtag_add_runtest(13, TAP_RTI);
virtex2_set_instr(virtex2_info->chain_pos, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->chain_pos, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->chain_pos, 0xc); /* JSTART */
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->tap, 0xc); /* JSTART */
jtag_add_runtest(13, TAP_RTI);
virtex2_set_instr(virtex2_info->chain_pos, 0x3f); /* BYPASS */
virtex2_set_instr(virtex2_info->tap, 0x3f); /* BYPASS */
jtag_execute_queue();

return ERROR_OK;
@@ -249,6 +248,8 @@ int virtex2_register_commands(struct command_context_s *cmd_ctx)

int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct pld_device_s *pld_device)
{
jtag_tap_t *tap;

virtex2_pld_device_t *virtex2_info;

if (argc < 2)
@@ -257,10 +258,15 @@ int virtex2_pld_device_command(struct command_context_s *cmd_ctx, char *cmd, cha
return ERROR_PLD_DEVICE_INVALID;
}

tap = jtag_TapByString( args[1] );
if( tap == NULL ){
command_print( cmd_ctx, "Tap: %s does not exist", args[1] );
return ERROR_OK;
}

virtex2_info = malloc(sizeof(virtex2_pld_device_t));
pld_device->driver_priv = virtex2_info;

virtex2_info->chain_pos = strtoul(args[1], NULL, 0);
virtex2_info->tap = tap;

return ERROR_OK;
}

+ 2
- 1
src/pld/virtex2.h View File

@@ -20,12 +20,13 @@
#ifndef VIRTEX2_H
#define VIRTEX2_H

#include "types.h"
#include "pld.h"
#include "xilinx_bit.h"

typedef struct virtex2_pld_device_s
{
int chain_pos;
jtag_tap_t *tap;
} virtex2_pld_device_t;

#endif /* VIRTEX2_H */

+ 9
- 24
src/target/Makefile.am View File

@@ -19,27 +19,12 @@ noinst_HEADERS = target.h trace.h register.h armv4_5.h embeddedice.h etm.h arm7t
arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_swjdp.h \
etm_dummy.h oocd_trace.h target_request.h trace.h arm11.h mips32.h mips_m4k.h mips_ejtag.h mips32_pracc.h mips32_dmaacc.h

nobase_dist_pkglib_DATA = xscale/debug_handler.bin target/at91eb40a.cfg \
target/at91r40008.cfg target/lpc2148.cfg target/lpc2148_rclk.cfg target/lpc2148_2mhz.cfg target/lpc2294.cfg \
target/sam7x256.cfg target/str710.cfg target/str912.cfg target/nslu2.cfg target/pxa255_sst.cfg \
target/pxa255.cfg target/zy1000.cfg target/at91sam9260.cfg \
target/wi-9c.cfg target/stm32.cfg target/xba_revA3.cfg \
ecos/at91eb40a.elf target/lm3s6965.cfg interface/parport.cfg \
interface/jtagkey-tiny.cfg interface/jtagkey.cfg interface/str9-comstick.cfg \
target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
target/str730.cfg target/stm32stick.cfg \
target/lm3s811.cfg interface/luminary.cfg interface/luminary-libftdi.cfg interface/luminary-lm3s811.cfg \
target/imx31.cfg target/lm3s3748.cfg \
interface/stm32-stick.cfg interface/calao-usb-a9260-c01.cfg interface/calao-usb-a9260-c02.cfg \
interface/calao-usb-a9260.cfg target/at91sam9260minimal.cfg \
interface/chameleon.cfg interface/at91rm9200.cfg interface/jlink.cfg interface/arm-usb-ocd.cfg \
interface/signalyzer.cfg target/eir-sam7se512.cfg \
interface/flyswatter.cfg target/hammer.cfg \
interface/olimex-jtag-tiny-a.cfg \
target/pic32mx.cfg target/aduc702x.cfg interface/dummy.cfg interface/olimex-arm-usb-ocd.cfg target/s3c2440.cfg \
interface/openocd-usb.cfg target/test_syntax_error.cfg target/test_reset_syntax_error.cfg \
target/imx27.cfg

nobase_dist_pkglib_DATA =
nobase_dist_pkglib_DATA += xscale/debug_handler.bin
nobase_dist_pkglib_DATA += ecos/at91eb40a.elf
# Various chip targets
nobase_dist_pkglib_DATA += $(wildcard $(srcdir)/target/*.cfg)
# Various jtag interfaces
nobase_dist_pkglib_DATA += $(wildcard $(srcdir)/interface/*.cfg)
# Various preconfigured boards
nobase_dist_pkglib_DATA += $(wildcard $(srcdir)/board/*.cfg)

+ 20
- 21
src/target/arm11.c View File

@@ -1526,7 +1526,7 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
arm11->target = target;

/* prepare JTAG information for the new target */
arm11->jtag_info.chain_pos = target->chain_position;
arm11->jtag_info.tap = target->tap;
arm11->jtag_info.scann_size = 5;

if((retval = arm_jtag_setup_connection(&arm11->jtag_info)) != ERROR_OK)
@@ -1534,13 +1534,12 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
return retval;
}

jtag_device_t *device = jtag_get_device(target->chain_position);
if (device==NULL)
if (target->tap==NULL)
return ERROR_FAIL;

if (device->ir_length != 5)
if (target->tap->ir_length != 5)
{
LOG_ERROR("'target arm11' expects 'jtag_device 5 0x01 0x1F 0x1E'");
LOG_ERROR("'target arm11' expects IR LENGTH = 5");
return ERROR_COMMAND_SYNTAX_ERROR;
}

@@ -1831,22 +1830,22 @@ const char arm11_mcr_syntax[] = "Syntax: mcr <jtag_target> <coprocessor> <opcode

arm11_common_t * arm11_find_target(const char * arg)
{
size_t jtag_target = strtoul(arg, NULL, 0);
{target_t * t;
for (t = all_targets; t; t = t->next)
{
if (strcmp(t->type->name,"arm11"))
continue;
arm11_common_t * arm11 = t->arch_info;
if (arm11->jtag_info.chain_pos != jtag_target)
continue;
return arm11;
}}
jtag_tap_t *tap;
target_t * t;
tap = jtag_TapByString( arg );
if( !tap ){
return NULL;
}
for (t = all_targets; t; t = t->next){
if( t->tap == tap ){
if( 0 == strcmp(t->type->name,"arm11")){
arm11_common_t * arm11 = t->arch_info;
return arm11;
}
}
}
return 0;
}



+ 9
- 8
src/target/arm11_dbgtap.c View File

@@ -78,7 +78,7 @@ int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, enum tap_state st
*/
void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, void * in_data, scan_field_t * field)
{
field->device = arm11->jtag_info.chain_pos;
field->tap = arm11->jtag_info.tap;
field->num_bits = num_bits;
field->out_mask = NULL;
field->in_check_mask = NULL;
@@ -101,16 +101,17 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
*/
void arm11_add_IR(arm11_common_t * arm11, u8 instr, enum tap_state state)
{
jtag_device_t *device = jtag_get_device(arm11->jtag_info.chain_pos);
if (device==NULL)
{
jtag_tap_t *tap;
tap = arm11->jtag_info.tap;
if( tap == NULL ){
/* FIX!!!! error is logged, but not propagated back up the call stack... */
LOG_ERROR( "tap is null here! This is bad!");
return;
}

if (buf_get_u32(device->cur_instr, 0, 5) == instr)
{
JTAG_DEBUG("IR <= 0x%02x SKIPPED", instr);
return;
if (buf_get_u32(tap->cur_instr, 0, 5) == instr){
JTAG_DEBUG("IR <= 0x%02x SKIPPED", instr);
return;
}

JTAG_DEBUG("IR <= 0x%02x", instr);


+ 5
- 5
src/target/arm720t.c View File

@@ -109,7 +109,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
return retval;
}
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = &instruction_buf;
fields[0].out_mask = NULL;
@@ -119,7 +119,7 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = out_buf;
fields[1].out_mask = NULL;
@@ -456,12 +456,12 @@ int arm720t_quit(void)
return ERROR_OK;
}

int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, int chain_pos, const char *variant)
int arm720t_init_arch_info(target_t *target, arm720t_common_t *arm720t, jtag_tap_t *tap, const char *variant)
{
arm7tdmi_common_t *arm7tdmi = &arm720t->arm7tdmi_common;
arm7_9_common_t *arm7_9 = &arm7tdmi->arm7_9_common;
arm7tdmi_init_arch_info(target, arm7tdmi, chain_pos, variant);
arm7tdmi_init_arch_info(target, arm7tdmi, tap, variant);

arm7tdmi->arch_info = arm720t;
arm720t->common_magic = ARM720T_COMMON_MAGIC;
@@ -485,7 +485,7 @@ int arm720t_target_create(struct target_s *target, Jim_Interp *interp)
{
arm720t_common_t *arm720t = calloc(1,sizeof(arm720t_common_t));
arm720t_init_arch_info(target, arm720t, target->chain_position, target->variant);
arm720t_init_arch_info(target, arm720t, target->tap, target->variant);

return ERROR_OK;
}


+ 3
- 2
src/target/arm7_9_common.c View File

@@ -2349,9 +2349,10 @@ static int arm7_9_dcc_completion(struct target_s *target, u32 exit_point, int ti

embeddedice_reg_t *ice_reg = arm7_9->eice_cache->reg_list[EICE_COMMS_DATA].arch_info;
u8 reg_addr = ice_reg->addr & 0x1f;
int chain_pos = ice_reg->jtag_info->chain_pos;
jtag_tap_t *tap;
tap = ice_reg->jtag_info->tap;

embeddedice_write_dcc(chain_pos, reg_addr, buffer, little, count-2);
embeddedice_write_dcc(tap, reg_addr, buffer, little, count-2);
buffer += (count-2)*4;

embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_COMMS_DATA], fast_target_buffer_get_u32(buffer, little));


+ 10
- 10
src/target/arm7tdmi.c View File

@@ -112,7 +112,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
jtag_add_end_state(TAP_PD);

fields[0].device = arm7_9->jtag_info.chain_pos;
fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -122,7 +122,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
fields[1].device = arm7_9->jtag_info.chain_pos;
fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -165,7 +165,7 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
{
u32 values[2]={breakpoint, flip_u32(out, 32)};
jtag_add_dr_out(jtag_info->chain_pos,
jtag_add_dr_out(jtag_info->tap,
2,
arm7tdmi_num_bits,
values,
@@ -199,7 +199,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -209,7 +209,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -260,7 +260,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -270,7 +270,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -784,7 +784,7 @@ int arm7tdmi_quit(void)
return ERROR_OK;
}

int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int chain_pos, const char *variant)
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap, const char *variant)
{
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
@@ -793,7 +793,7 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c
armv4_5 = &arm7_9->armv4_5_common;
/* prepare JTAG information for the new target */
arm7_9->jtag_info.chain_pos = chain_pos;
arm7_9->jtag_info.tap = tap;
arm7_9->jtag_info.scann_size = 4;
/* register arch-specific functions */
@@ -860,7 +860,7 @@ int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp )
arm7tdmi = calloc(1,sizeof(arm7tdmi_common_t));
arm7tdmi_init_arch_info(target, arm7tdmi, target->chain_position, target->variant);
arm7tdmi_init_arch_info(target, arm7tdmi, target->tap, target->variant);
return ERROR_OK;
}


+ 1
- 1
src/target/arm7tdmi.h View File

@@ -41,7 +41,7 @@ typedef struct arm7tdmi_common_s
} arm7tdmi_common_t;

int arm7tdmi_register_commands(struct command_context_s *cmd_ctx);
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int chain_pos, const char *variant);
int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_tap_t *tap, const char *variant);
int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm7tdmi_examine(struct target_s *target);



+ 15
- 15
src/target/arm920t.c View File

@@ -110,7 +110,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
arm_jtag_scann(jtag_info, 0xf);
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
fields[0].out_mask = NULL;
@@ -120,7 +120,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -130,7 +130,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 6;
fields[2].out_value = &reg_addr_buf;
fields[2].out_mask = NULL;
@@ -140,7 +140,7 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;

fields[3].device = jtag_info->chain_pos;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
@@ -182,7 +182,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
arm_jtag_scann(jtag_info, 0xf);
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
fields[0].out_mask = NULL;
@@ -192,7 +192,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = value_buf;
fields[1].out_mask = NULL;
@@ -202,7 +202,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 6;
fields[2].out_value = &reg_addr_buf;
fields[2].out_mask = NULL;
@@ -212,7 +212,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;

fields[3].device = jtag_info->chain_pos;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
@@ -249,7 +249,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
buf_set_u32(cp15_opcode_buf, 0, 32, cp15_opcode);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
fields[0].out_value = &access_type_buf;
fields[0].out_mask = NULL;
@@ -259,7 +259,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
fields[1].out_value = cp15_opcode_buf;
fields[1].out_mask = NULL;
@@ -269,7 +269,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 6;
fields[2].out_value = &reg_addr_buf;
fields[2].out_mask = NULL;
@@ -279,7 +279,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;

fields[3].device = jtag_info->chain_pos;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
@@ -712,14 +712,14 @@ int arm920t_quit(void)
return ERROR_OK;
}

int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, int chain_pos, const char *variant)
int arm920t_init_arch_info(target_t *target, arm920t_common_t *arm920t, jtag_tap_t *tap, const char *variant)
{
arm9tdmi_common_t *arm9tdmi = &arm920t->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
/* initialize arm9tdmi specific info (including arm7_9 and armv4_5)
*/
arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant);

arm9tdmi->arch_info = arm920t;
arm920t->common_magic = ARM920T_COMMON_MAGIC;
@@ -752,7 +752,7 @@ int arm920t_target_create(struct target_s *target, Jim_Interp *interp)
{
arm920t_common_t *arm920t = calloc(1,sizeof(arm920t_common_t));
arm920t_init_arch_info(target, arm920t, target->chain_position, target->variant);
arm920t_init_arch_info(target, arm920t, target->tap, target->variant);

return ERROR_OK;
}


+ 11
- 11
src/target/arm926ejs.c View File

@@ -139,7 +139,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -149,7 +149,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 1;
fields[1].out_value = &access;
fields[1].out_mask = NULL;
@@ -159,7 +159,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 14;
fields[2].out_value = address_buf;
fields[2].out_mask = NULL;
@@ -169,7 +169,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;

fields[3].device = jtag_info->chain_pos;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
@@ -229,7 +229,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
fields[0].out_mask = NULL;
@@ -239,7 +239,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 1;
fields[1].out_value = &access;
fields[1].out_mask = NULL;
@@ -249,7 +249,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 14;
fields[2].out_value = address_buf;
fields[2].out_mask = NULL;
@@ -259,7 +259,7 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
fields[2].in_handler = NULL;
fields[2].in_handler_priv = NULL;

fields[3].device = jtag_info->chain_pos;
fields[3].tap = jtag_info->tap;
fields[3].num_bits = 1;
fields[3].out_value = &nr_w_buf;
fields[3].out_mask = NULL;
@@ -714,14 +714,14 @@ int arm926ejs_quit(void)
return ERROR_OK;
}

int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, const char *variant)
int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap, const char *variant)
{
arm9tdmi_common_t *arm9tdmi = &arm926ejs->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;

/* initialize arm9tdmi specific info (including arm7_9 and armv4_5)
*/
arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant);

arm9tdmi->arch_info = arm926ejs;
arm926ejs->common_magic = ARM926EJS_COMMON_MAGIC;
@@ -755,7 +755,7 @@ int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp)
{
arm926ejs_common_t *arm926ejs = calloc(1,sizeof(arm926ejs_common_t));

arm926ejs_init_arch_info(target, arm926ejs, target->chain_position, target->variant);
arm926ejs_init_arch_info(target, arm926ejs, target->tap, target->variant);

return ERROR_OK;
}


+ 1
- 1
src/target/arm926ejs.h View File

@@ -43,7 +43,7 @@ typedef struct arm926ejs_common_s
u32 d_far;
} arm926ejs_common_t;

extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, int chain_pos, const char *variant);
extern int arm926ejs_init_arch_info(target_t *target, arm926ejs_common_t *arm926ejs, jtag_tap_t *tap, const char *variant);
extern int arm926ejs_register_commands(struct command_context_s *cmd_ctx);
extern int arm926ejs_arch_state(struct target_s *target);
extern int arm926ejs_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer);


+ 9
- 9
src/target/arm966e.c View File

@@ -102,12 +102,12 @@ int arm966e_quit(void)
return ERROR_OK;
}

int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, int chain_pos, const char *variant)
int arm966e_init_arch_info(target_t *target, arm966e_common_t *arm966e, jtag_tap_t *tap, const char *variant)
{
arm9tdmi_common_t *arm9tdmi = &arm966e->arm9tdmi_common;
arm7_9_common_t *arm7_9 = &arm9tdmi->arm7_9_common;
arm9tdmi_init_arch_info(target, arm9tdmi, chain_pos, variant);
arm9tdmi_init_arch_info(target, arm9tdmi, tap, variant);

arm9tdmi->arch_info = arm966e;
arm966e->common_magic = ARM966E_COMMON_MAGIC;
@@ -125,7 +125,7 @@ int arm966e_target_create( struct target_s *target, Jim_Interp *interp )
{
arm966e_common_t *arm966e = calloc(1,sizeof(arm966e_common_t));
arm966e_init_arch_info(target, arm966e, target->chain_position, target->variant);
arm966e_init_arch_info(target, arm966e, target->tap, target->variant);

return ERROR_OK;
}
@@ -185,7 +185,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -195,7 +195,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = &reg_addr_buf;
fields[1].out_mask = NULL;
@@ -205,7 +205,7 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].out_mask = NULL;
@@ -253,7 +253,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
}
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);

fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = value_buf;
fields[0].out_mask = NULL;
@@ -263,7 +263,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;

fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 6;
fields[1].out_value = &reg_addr_buf;
fields[1].out_mask = NULL;
@@ -273,7 +273,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 1;
fields[2].out_value = &nr_w_buf;
fields[2].out_mask = NULL;


+ 15
- 15
src/target/arm9tdmi.c View File

@@ -127,7 +127,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)

jtag_add_end_state(TAP_PD);

fields[0].device = arm7_9->jtag_info.chain_pos;
fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -137,7 +137,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
fields[0].in_handler = NULL;
fields[0].in_handler_priv = NULL;
fields[1].device = arm7_9->jtag_info.chain_pos;
fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -147,7 +147,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
fields[2].device = arm7_9->jtag_info.chain_pos;
fields[2].tap = arm7_9->jtag_info.tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].out_mask = NULL;
@@ -215,7 +215,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
fields[0].out_mask = NULL;
@@ -233,7 +233,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
fields[0].in_check_value = NULL;
fields[0].in_check_mask = NULL;
fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = &sysspeed_buf;
fields[1].out_mask = NULL;
@@ -243,7 +243,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
fields[1].in_handler = NULL;
fields[1].in_handler_priv = NULL;
fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = instr_buf;
fields[2].out_mask = NULL;
@@ -290,7 +290,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -300,7 +300,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[0].in_check_value = NULL;
fields[0].in_check_mask = NULL;
fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -310,7 +310,7 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].out_mask = NULL;
@@ -362,7 +362,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
fields[0].device = jtag_info->chain_pos;
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].out_mask = NULL;
@@ -383,7 +383,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[0].in_check_value = NULL;
fields[0].in_check_mask = NULL;
fields[1].device = jtag_info->chain_pos;
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].out_mask = NULL;
@@ -393,7 +393,7 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
fields[1].in_check_value = NULL;
fields[1].in_check_mask = NULL;

fields[2].device = jtag_info->chain_pos;
fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].out_mask = NULL;
@@ -941,7 +941,7 @@ int arm9tdmi_quit(void)
return ERROR_OK;
}

int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, const char *variant)
int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap, const char *variant)
{
armv4_5_common_t *armv4_5;
arm7_9_common_t *arm7_9;
@@ -950,7 +950,7 @@ int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int c
armv4_5 = &arm7_9->armv4_5_common;
/* prepare JTAG information for the new target */
arm7_9->jtag_info.chain_pos = chain_pos;
arm7_9->jtag_info.tap = tap;
arm7_9->jtag_info.scann_size = 5;
/* register arch-specific functions */
@@ -1051,7 +1051,7 @@ int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp)
{
arm9tdmi_common_t *arm9tdmi = calloc(1,sizeof(arm9tdmi_common_t));

arm9tdmi_init_arch_info(target, arm9tdmi, target->chain_position, target->variant);
arm9tdmi_init_arch_info(target, arm9tdmi, target->tap, target->variant);
return ERROR_OK;
}


+ 1
- 1
src/target/arm9tdmi.h View File

@@ -60,7 +60,7 @@ enum arm9tdmi_vector

extern int arm9tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
int arm9tdmi_examine(struct target_s *target);
extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, int chain_pos, const char *variant);
extern int arm9tdmi_init_arch_info(target_t *target, arm9tdmi_common_t *arm9tdmi, jtag_tap_t *tap, const char *variant);
extern int arm9tdmi_register_commands(struct command_context_s *cmd_ctx);

extern int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed);


+ 7
- 6
src/target/arm_jtag.c View File

@@ -38,17 +38,18 @@

int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, in_handler_t handler)
{
jtag_device_t *device = jtag_get_device(jtag_info->chain_pos);
if (device==NULL)
jtag_tap_t *tap;
tap = jtag_info->tap;
if (tap==NULL)
return ERROR_FAIL;

if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
{
scan_field_t field;
u8 t[4];

field.device = jtag_info->chain_pos;
field.num_bits = device->ir_length;
field.tap = tap;
field.num_bits = tap->ir_length;
field.out_value = t;
buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
field.out_mask = NULL;
@@ -79,7 +80,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
return retval;
}

jtag_add_dr_out(jtag_info->chain_pos,
jtag_add_dr_out(jtag_info->tap,
1,
num_bits,
values,


+ 1
- 1
src/target/arm_jtag.h View File

@@ -28,7 +28,7 @@

typedef struct arm_jtag_s
{
int chain_pos;
jtag_tap_t *tap;
int scann_size;
u32 scann_instr;


+ 10
- 0
src/target/board/arm_evaluator7t.cfg View File

@@ -0,0 +1,10 @@
# This board is from ARM and has an samsung s3c45101x01 chip

source [find target/samsung_s3c4510.cfg]

#
# FIXME:
# Add (A) sdram configuration
# Add (B) flash cfi programing configuration
#


+ 78
- 0
src/target/board/at91rm9200-dk.cfg View File

@@ -0,0 +1,78 @@
#
# This is for the "at91rm9200-DK" (not the EK) eval board.
#
# The two are probably very simular.... I have DK...
#
# It has atmel at91rm9200 chip.
source [find target/at91rm9200.cfg]
$_TARGETNAME configure -event gdb-attach { reset init }
$_TARGETNAME configure -event reset-init { at91rm9200_dk_init }

#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash_bank cfi 0x10000000 0x00200000 2 2 0


proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
jtag_khz 8
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
mww 0xfffffc04 0xfffffffe
## disable all clocks to pioa and piob
mww 0xfffffc14 0xffffffc3
## master clock = slow cpu = slow
## (means the CPU is running at 32khz!)
mww 0xfffffc30 0
## main osc enable
mww 0xfffffc20 0x0000ff01
## program pllA
mww 0xfffffc28 0x20263e04
## program pllB
mww 0xfffffc2c 0x10483e0e
## let pll settle... sleep 100msec
sleep 100
## switch to fast clock
mww 0xfffffc30 0x202
## Sleep some - (go read)
sleep 100
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
jtag_khz 40000
#========================================
## set memc for all memories
mww 0xffffff60 0x02
## program smc controller
mww 0xffffff70 0x3284
## init sdram
mww 0xffffff98 0x7fffffd0
## all banks precharge
mww 0xffffff80 0x02
## touch sdram chip to make it work
mww 0x20000000 0
## sdram controller mode register
mww 0xffffff90 0x04
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0