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@@ -436,22 +436,22 @@ proc initC100 {} { |
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# */ |
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# mov r0, #0 |
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# mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ |
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mcr 15 0 7 7 0 0x0 |
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arm mcr 15 0 7 7 0 0x0 |
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# mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ |
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mcr 15 0 8 7 0 0x0 |
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arm mcr 15 0 8 7 0 0x0 |
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# /* |
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# * disable MMU stuff and caches |
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# */ |
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# mrc p15, 0, r0, c1, c0, 0 |
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mrc 15 0 1 0 0 |
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arm mrc 15 0 1 0 0 |
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# bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) |
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# bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) |
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# orr r0, r0, #0x00000002 @ set bit 2 (A) Align |
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# orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache |
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# orr r0, r0, #0x00400000 @ set bit 22 (U) |
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# mcr p15, 0, r0, c1, c0, 0 |
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mcr 15 0 1 0 0 0x401002 |
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arm mcr 15 0 1 0 0 0x401002 |
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# This is from bsp_init() in u-boot/boards/mindspeed/ooma-darwin/board.c |
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# APB init |
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# // Setting APB Bus Wait states to 1, set post write |
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