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@@ -123,6 +123,8 @@ static int dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode) |
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cpsr = mode; |
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retval = dpm->instr_write_data_r0(dpm, ARMV4_5_MSR_GP(0, 0xf, 0), cpsr); |
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if (retval != ERROR_OK) |
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return retval; |
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if (dpm->instr_cpsr_sync) |
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retval = dpm->instr_cpsr_sync(dpm); |
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@@ -211,6 +213,8 @@ static int dpm_write_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) |
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retval = dpm->instr_write_data_r0(dpm, |
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ARMV4_5_MSR_GP(0, 0xf, regnum & 1), |
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value); |
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if (retval != ERROR_OK) |
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return retval; |
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if (regnum == 16 && dpm->instr_cpsr_sync) |
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retval = dpm->instr_cpsr_sync(dpm); |
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@@ -364,6 +368,8 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) |
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retval = dpm_maybe_update_bpwp(dpm, bpwp, &dbp->bpwp, |
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bp ? &bp->set : NULL); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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} |
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@@ -374,6 +380,8 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) |
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retval = dpm_maybe_update_bpwp(dpm, bpwp, &dwp->bpwp, |
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wp ? &wp->set : NULL); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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/* NOTE: writes to breakpoint and watchpoint registers might |
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@@ -433,7 +441,11 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) |
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/* REVISIT error checks */ |
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if (tmode != ARM_MODE_ANY) |
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{ |
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retval = dpm_modeswitch(dpm, tmode); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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} |
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if (r->mode != mode) |
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continue; |
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@@ -441,7 +453,8 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) |
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retval = dpm_write_reg(dpm, |
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&cache->reg_list[i], |
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regnum); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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} while (did_write); |
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@@ -451,13 +464,19 @@ int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp) |
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* defined, and must not write it before CPSR. |
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*/ |
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retval = dpm_modeswitch(dpm, ARM_MODE_ANY); |
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if (retval != ERROR_OK) |
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goto done; |
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arm->cpsr->dirty = false; |
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retval = dpm_write_reg(dpm, arm->pc, 15); |
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if (retval != ERROR_OK) |
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goto done; |
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arm->pc->dirty = false; |
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/* flush R0 -- it's *very* dirty by now */ |
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retval = dpm_write_reg(dpm, &cache->reg_list[0], 0); |
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if (retval != ERROR_OK) |
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goto done; |
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cache->reg_list[0].dirty = false; |
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/* (void) */ dpm->finish(dpm); |
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@@ -540,6 +559,8 @@ static int arm_dpm_read_core_reg(struct target *target, struct reg *r, |
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} |
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retval = dpm_read_reg(dpm, r, regnum); |
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if (retval != ERROR_OK) |
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goto fail; |
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/* always clean up, regardless of error */ |
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if (mode != ARM_MODE_ANY) |
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@@ -636,6 +657,8 @@ static int arm_dpm_full_context(struct target *target) |
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/* REVISIT error checks */ |
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retval = dpm_modeswitch(dpm, mode); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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if (r->mode != mode) |
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continue; |
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@@ -644,7 +667,8 @@ static int arm_dpm_full_context(struct target *target) |
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retval = dpm_read_reg(dpm, |
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&cache->reg_list[i], |
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(r->num == 16) ? 17 : r->num); |
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if (retval != ERROR_OK) |
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goto done; |
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} |
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} while (did_read); |
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