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@@ -77,7 +77,7 @@ typedef struct arm11_common_s |
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size_t brp; /**< Number of Breakpoint Register Pairs from DIDR */ |
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size_t wrp; /**< Number of Watchpoint Register Pairs from DIDR */ |
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enum arm11_debug_version |
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debug_version; /**< ARM debug architecture from DIDR */ |
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/*@}*/ |
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@@ -109,8 +109,8 @@ typedef struct arm11_common_s |
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/** |
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* ARM11 DBGTAP instructions |
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* |
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* ARM11 DBGTAP instructions |
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* |
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* http://infocenter.arm.com/help/topic/com.arm.doc.ddi0301f/I1006229.html |
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*/ |
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enum arm11_instructions |
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@@ -191,7 +191,7 @@ int arm11_soft_reset_halt(struct target_s *target); |
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/* target register access for gdb */ |
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int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], int *reg_list_size); |
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/* target memory access |
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/* target memory access |
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* size: 1 = byte (8bit), 2 = half-word (16bit), 4 = word (32bit) |
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* count: number of items of <size> |
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*/ |
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@@ -203,7 +203,7 @@ int arm11_bulk_write_memory(struct target_s *target, u32 address, u32 count, u8 |
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int arm11_checksum_memory(struct target_s *target, u32 address, u32 count, u32* checksum); |
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/* target break-/watchpoint control |
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/* target break-/watchpoint control |
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* rw: 0 = write, 1 = read, 2 = access |
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*/ |
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int arm11_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint); |
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@@ -220,7 +220,7 @@ int arm11_init_target(struct command_context_s *cmd_ctx, struct target_s *target |
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int arm11_quit(void); |
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/* helpers */ |
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void arm11_build_reg_cache(target_t *target); |
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int arm11_build_reg_cache(target_t *target); |
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int arm11_set_reg(reg_t *reg, u8 *buf); |
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int arm11_get_reg(reg_t *reg); |
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