Browse Source

topic: Added support for the SAM4S variants

Atmel introduced 6 new Cortex-M4 processors on 2011-10-26
SAM4S16C - 1024KB flash LQFP100/BGA100
SAM4S16B - 1024KB flash LQFP64/QFN64
SAM4S16A - 1024KB flash LQFP48/QFN48
SAM4S8C - 512KB flash LQFP100/BGA100
SAM4S8B - 512KB flash LQFP64/QFN64
SAM4S8A - 512KB flash LQFP48/QFN48

The SAM4S processors still suffer from the "6 waitstates needed
to program device" errata.

Other relevant changes are:
1. Address of flash memory starts at 0x400000.
2. EWP (Erase page and write page) only works for the first two 8KB "sectors"
3. Because of the EWP not working for all the sectors, normal page writes have
to be used.  The default_flash_blank_check is used to check if lockregions
should be erased.
4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was
500 ms)
5. There are 128 lockable regions of 8KB each.

Implemented default blank checking, and page erase for load_image scenarios.
This is to compensate for the EWP flash commands only working on the
first 2 8KB sectors.

Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/528
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
tags/v0.6.0-rc1
Olivier Schonken 10 years ago
committed by Spencer Oliver
parent
commit
d1cd97777b
7 changed files with 2377 additions and 0 deletions
  1. +8
    -0
      doc/openocd.texi
  2. +1
    -0
      src/flash/nor/Makefile.am
  3. +2310
    -0
      src/flash/nor/at91sam4.c
  4. +2
    -0
      src/flash/nor/drivers.c
  5. +3
    -0
      tcl/board/atmel_sam4s_ek.cfg
  6. +45
    -0
      tcl/target/at91sam4XXX.cfg
  7. +8
    -0
      tcl/target/at91sam4sXX.cfg

+ 8
- 0
doc/openocd.texi View File

@@ -4538,6 +4538,7 @@ flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
@end example
@end deffn

@anchor{at91sam3}
@deffn {Flash Driver} at91sam3
@cindex at91sam3
All members of the AT91SAM3 microcontroller family from
@@ -4602,6 +4603,13 @@ This command shows/sets the slow clock frequency used in the
@end deffn
@end deffn

@deffn {Flash Driver} at91sam4
@cindex at91sam4
All members of the AT91SAM4 microcontroller family from
Atmel include internal flash and use ARM's Cortex-M4 core.
This driver uses the same cmd names/syntax as @xref{at91sam3}.
@end deffn

@deffn {Flash Driver} at91sam7
All members of the AT91SAM7 microcontroller family from Atmel include
internal flash and use ARM7TDMI cores. The driver automatically


+ 1
- 0
src/flash/nor/Makefile.am View File

@@ -9,6 +9,7 @@ libocdflashnor_la_SOURCES = \

NOR_DRIVERS = \
aduc702x.c \
at91sam4.c \
at91sam3.c \
at91sam7.c \
avrf.c \


+ 2310
- 0
src/flash/nor/at91sam4.c
File diff suppressed because it is too large
View File


+ 2
- 0
src/flash/nor/drivers.c View File

@@ -27,6 +27,7 @@ extern struct flash_driver lpc288x_flash;
extern struct flash_driver lpc2900_flash;
extern struct flash_driver cfi_flash;
extern struct flash_driver at91sam3_flash;
extern struct flash_driver at91sam4_flash;
extern struct flash_driver at91sam7_flash;
extern struct flash_driver str7x_flash;
extern struct flash_driver str9x_flash;
@@ -59,6 +60,7 @@ static struct flash_driver *flash_drivers[] = {
&cfi_flash,
&at91sam7_flash,
&at91sam3_flash,
&at91sam4_flash,
&str7x_flash,
&str9x_flash,
&aduc702x_flash,


+ 3
- 0
tcl/board/atmel_sam4s_ek.cfg View File

@@ -0,0 +1,3 @@
source [find target/at91sam4sXX.cfg]

$_TARGETNAME configure -event gdb-attach { reset init }

+ 45
- 0
tcl/target/at91sam4XXX.cfg View File

@@ -0,0 +1,45 @@
# script for ATMEL sam4, a CORTEX-M4 chip
#

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME sam4
}

if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}

# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
#
# Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable.

adapter_khz 500

adapter_nsrst_delay 100
jtag_ntrst_delay 100

#jtag scan chain
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x4ba00477
}

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME

# 16K is plenty, the smallest chip has this much
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0

$_TARGETNAME configure -event gdb-flash-erase-start {
halt
}

+ 8
- 0
tcl/target/at91sam4sXX.cfg View File

@@ -0,0 +1,8 @@
# script for ATMEL sam4, a CORTEX-M4 chip
#


source [find target/at91sam4XXX.cfg]

set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME at91sam4 0x00400000 0 1 1 $_TARGETNAME

Loading…
Cancel
Save