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@@ -329,11 +329,17 @@ static int armv7m_read_core_reg(struct target *target, struct reg *r, |
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if (r->size <= 8) { |
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/* any 8-bit or shorter register is packed */ |
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uint32_t offset = 0; /* silence false gcc warning */ |
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uint32_t offset; |
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unsigned int reg32_id; |
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bool is_packed = armv7m_map_reg_packing(num, ®32_id, &offset); |
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assert(is_packed); |
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if (!is_packed) { |
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/* We should not get here as all 8-bit or shorter registers |
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* are packed */ |
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assert(false); |
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/* assert() does nothing if NDEBUG is defined */ |
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return ERROR_FAIL; |
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} |
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struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id]; |
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/* Read 32-bit container register if not cached */ |
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@@ -394,11 +400,17 @@ static int armv7m_write_core_reg(struct target *target, struct reg *r, |
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if (r->size <= 8) { |
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/* any 8-bit or shorter register is packed */ |
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uint32_t offset = 0; /* silence false gcc warning */ |
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uint32_t offset; |
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unsigned int reg32_id; |
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bool is_packed = armv7m_map_reg_packing(num, ®32_id, &offset); |
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assert(is_packed); |
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if (!is_packed) { |
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/* We should not get here as all 8-bit or shorter registers |
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* are packed */ |
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assert(false); |
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/* assert() does nothing if NDEBUG is defined */ |
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return ERROR_FAIL; |
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} |
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struct reg *r32 = &armv7m->arm.core_cache->reg_list[reg32_id]; |
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if (!r32->valid) { |
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