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coding style: fix space separation

The checkpatch script from Linux kernel v5.1 complains about using
space before comma, before semicolon and between function name and
open parenthesis.
Fix them!

Issue identified using the command

	find src/ -type f -exec ./tools/scripts/checkpatch.pl \
	-q --types SPACING -f {} \;

The patch only changes amount and position of whitespace, thus
the following commands show empty diff
	git diff -w
	git log -w -p
	git log -w --stat

Change-Id: I1062051d7f97d59922847f5061c6d6811742d30e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5627
Tested-by: jenkins
jim
Antonio Borneo 4 years ago
parent
commit
e2315ccffd
17 changed files with 262 additions and 262 deletions
  1. +1
    -1
      src/flash/nor/at91sam3.c
  2. +3
    -3
      src/flash/nor/fespi.c
  3. +2
    -2
      src/flash/nor/lpcspifi.c
  4. +1
    -1
      src/flash/nor/niietcm4.c
  5. +1
    -1
      src/jtag/drivers/opendous.c
  6. +19
    -19
      src/jtag/hla/hla_layout.h
  7. +1
    -1
      src/rtos/rtos_mqx_stackings.c
  8. +2
    -2
      src/svf/svf.c
  9. +2
    -2
      src/target/arc.c
  10. +17
    -17
      src/target/armv8.c
  11. +2
    -2
      src/target/dsp563xx.h
  12. +1
    -1
      src/target/mips32.c
  13. +1
    -1
      src/target/mips64.c
  14. +4
    -4
      src/target/nds32.c
  15. +183
    -183
      src/target/openrisc/or1k.c
  16. +2
    -2
      src/target/stm8.c
  17. +20
    -20
      src/target/target.c

+ 1
- 1
src/flash/nor/at91sam3.c View File

@@ -1923,7 +1923,7 @@ static const struct sam3_chip_details all_sam3_details[] = {
.pChip = NULL,
.pBank = NULL,
.bank_number = 1,
.base_address = FLASH_BANK1_BASE_512K_AX ,
.base_address = FLASH_BANK1_BASE_512K_AX,
.controller_address = 0x400e0c00,
.flash_wait_states = 6, /* workaround silicon bug */
.present = 1,


+ 3
- 3
src/flash/nor/fespi.c View File

@@ -136,9 +136,9 @@ struct fespi_target {
/* TODO !!! What is the right naming convention here? */
static const struct fespi_target target_devices[] = {
/* name, tap_idcode, ctrl_base */
{ "Freedom E310-G000 SPI Flash", 0x10e31913 , 0x10014000 },
{ "Freedom E310-G002 SPI Flash", 0x20000913 , 0x10014000 },
{ NULL, 0, 0 }
{ "Freedom E310-G000 SPI Flash", 0x10e31913, 0x10014000 },
{ "Freedom E310-G002 SPI Flash", 0x20000913, 0x10014000 },
{ NULL, 0, 0 }
};

FLASH_BANK_COMMAND_HANDLER(fespi_flash_bank_command)


+ 2
- 2
src/flash/nor/lpcspifi.c View File

@@ -216,7 +216,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)

/* Run the algorithm */
LOG_DEBUG("Running SPIFI init algorithm");
retval = target_run_algorithm(target, 0 , NULL, 2, reg_params,
retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
spifi_init_algorithm->address,
spifi_init_algorithm->address + sizeof(spifi_init_code) - 2,
1000, &armv7m_info);
@@ -550,7 +550,7 @@ static int lpcspifi_erase(struct flash_bank *bank, unsigned int first,
buf_set_u32(reg_params[3].value, 0, 32, bank->sectors[first].size);

/* Run the algorithm */
retval = target_run_algorithm(target, 0 , NULL, 4, reg_params,
retval = target_run_algorithm(target, 0, NULL, 4, reg_params,
erase_algorithm->address,
erase_algorithm->address + sizeof(lpcspifi_flash_erase_code) - 4,
3000*(last - first + 1), &armv7m_info);


+ 1
- 1
src/flash/nor/niietcm4.c View File

@@ -1659,7 +1659,7 @@ static int niietcm4_probe_k1921vk01t(struct flash_bank *bank)
niietcm4_info->extmem_boot_pin,
niietcm4_info->extmem_boot_altfunc,
niietcm4_info->extmem_boot ? "enable" : "disable");
} else{
} else {
bank->size = 0x100000;
bank->num_sectors = 128;



+ 1
- 1
src/jtag/drivers/opendous.c View File

@@ -596,7 +596,7 @@ void opendous_tap_append_step(int tms, int tdi)
if (!bits)
tms_buffer[tap_index] = 0;

tms_buffer[tap_index] |= (_tdi << bits)|(_tms << (bits + 1)) ;
tms_buffer[tap_index] |= (_tdi << bits)|(_tms << (bits + 1));
tap_length++;
} else
LOG_ERROR("opendous_tap_append_step, overflow");


+ 19
- 19
src/jtag/hla/hla_layout.h View File

@@ -35,33 +35,33 @@ extern struct hl_layout_api_s icdi_usb_layout_api;
/** */
struct hl_layout_api_s {
/** */
int (*open) (struct hl_interface_param_s *param, void **handle);
int (*open)(struct hl_interface_param_s *param, void **handle);
/** */
int (*close) (void *handle);
int (*close)(void *handle);
/** */
int (*reset) (void *handle);
int (*reset)(void *handle);
/** */
int (*assert_srst) (void *handle, int srst);
int (*assert_srst)(void *handle, int srst);
/** */
int (*run) (void *handle);
int (*run)(void *handle);
/** */
int (*halt) (void *handle);
int (*halt)(void *handle);
/** */
int (*step) (void *handle);
int (*step)(void *handle);
/** */
int (*read_regs) (void *handle);
int (*read_regs)(void *handle);
/** */
int (*read_reg) (void *handle, int num, uint32_t *val);
int (*read_reg)(void *handle, int num, uint32_t *val);
/** */
int (*write_reg) (void *handle, int num, uint32_t val);
int (*write_reg)(void *handle, int num, uint32_t val);
/** */
int (*read_mem) (void *handle, uint32_t addr, uint32_t size,
int (*read_mem)(void *handle, uint32_t addr, uint32_t size,
uint32_t count, uint8_t *buffer);
/** */
int (*write_mem) (void *handle, uint32_t addr, uint32_t size,
int (*write_mem)(void *handle, uint32_t addr, uint32_t size,
uint32_t count, const uint8_t *buffer);
/** */
int (*write_debug_reg) (void *handle, uint32_t addr, uint32_t val);
int (*write_debug_reg)(void *handle, uint32_t addr, uint32_t val);
/**
* Read the idcode of the target connected to the adapter
*
@@ -72,11 +72,11 @@ struct hl_layout_api_s {
* @param idcode Storage for the detected idcode
* @returns ERROR_OK on success, or an error code on failure.
*/
int (*idcode) (void *handle, uint32_t *idcode);
int (*idcode)(void *handle, uint32_t *idcode);
/** */
int (*override_target) (const char *targetname);
int (*override_target)(const char *targetname);
/** */
int (*custom_command) (void *handle, const char *command);
int (*custom_command)(void *handle, const char *command);
/** */
int (*speed)(void *handle, int khz, bool query);
/**
@@ -107,7 +107,7 @@ struct hl_layout_api_s {
*/
int (*poll_trace)(void *handle, uint8_t *buf, size_t *size);
/** */
enum target_state (*state) (void *fd);
enum target_state (*state)(void *fd);
};

/** */
@@ -115,9 +115,9 @@ struct hl_layout {
/** */
char *name;
/** */
int (*open) (struct hl_interface_s *adapter);
int (*open)(struct hl_interface_s *adapter);
/** */
int (*close) (struct hl_interface_s *adapter);
int (*close)(struct hl_interface_s *adapter);
/** */
struct hl_layout_api_s *api;
};


+ 1
- 1
src/rtos/rtos_mqx_stackings.c View File

@@ -64,7 +64,7 @@ static const struct stack_register_offset rtos_mqx_arm_v7m_stack_offsets[ARMV7M_
{ ARMV7M_R10, 0x20, 32 }, /* r10 */
{ ARMV7M_R11, 0x24, 32 }, /* r11 */
{ ARMV7M_R12, 0x3C, 32 }, /* r12 */
{ ARMV7M_R13, -2 , 32 }, /* sp */
{ ARMV7M_R13, -2, 32 }, /* sp */
{ ARMV7M_R14, 0x28, 32 }, /* lr */
{ ARMV7M_PC, 0x44, 32 }, /* pc */
{ ARMV7M_xPSR, 0x48, 32 }, /* xPSR */


+ 2
- 2
src/svf/svf.c View File

@@ -226,7 +226,7 @@ static int svf_getline(char **lineptr, size_t *n, FILE *stream);

#define SVF_MAX_BUFFER_SIZE_TO_COMMIT (1024 * 1024)
static uint8_t *svf_tdi_buffer, *svf_tdo_buffer, *svf_mask_buffer;
static int svf_buffer_index, svf_buffer_size ;
static int svf_buffer_index, svf_buffer_size;
static int svf_quiet;
static int svf_nil;
static int svf_ignore_error;
@@ -246,7 +246,7 @@ static int svf_last_printed_percentage = -1;
* DEBUG, INFO, ERROR, USER
*/
#define SVF_BUF_LOG(_lvl, _buf, _nbits, _desc) \
svf_hexbuf_print(LOG_LVL_##_lvl , __FILE__, __LINE__, __func__, _buf, _nbits, _desc)
svf_hexbuf_print(LOG_LVL_##_lvl, __FILE__, __LINE__, __func__, _buf, _nbits, _desc)

static void svf_hexbuf_print(int dbg_lvl, const char *file, unsigned line,
const char *function, const uint8_t *buf,


+ 2
- 2
src/target/arc.c View File

@@ -247,7 +247,7 @@ static int arc_get_register(struct reg *reg)
reg->dirty = false;

LOG_DEBUG("Get register gdb_num=%" PRIu32 ", name=%s, value=0x%" PRIx32,
reg->number , desc->name, value);
reg->number, desc->name, value);


return ERROR_OK;
@@ -884,7 +884,7 @@ static int arc_save_context(struct target *target)
reg->valid = true;
reg->dirty = false;
LOG_DEBUG("Get aux register regnum=%" PRIu32 ", name=%s, value=0x%08" PRIx32,
i , arc_reg->name, aux_values[aux_cnt]);
i, arc_reg->name, aux_values[aux_cnt]);
}
}



+ 17
- 17
src/target/armv8.c View File

@@ -1288,13 +1288,13 @@ static struct reg_data_type aarch64v[] = {
};

static struct reg_data_type_bitfield aarch64_cpsr_bits[] = {
{ 0, 0 , REG_TYPE_UINT8 },
{ 2, 3, REG_TYPE_UINT8 },
{ 4, 4 , REG_TYPE_UINT8 },
{ 6, 6 , REG_TYPE_BOOL },
{ 7, 7 , REG_TYPE_BOOL },
{ 8, 8 , REG_TYPE_BOOL },
{ 9, 9 , REG_TYPE_BOOL },
{ 0, 0, REG_TYPE_UINT8 },
{ 2, 3, REG_TYPE_UINT8 },
{ 4, 4, REG_TYPE_UINT8 },
{ 6, 6, REG_TYPE_BOOL },
{ 7, 7, REG_TYPE_BOOL },
{ 8, 8, REG_TYPE_BOOL },
{ 9, 9, REG_TYPE_BOOL },
{ 20, 20, REG_TYPE_BOOL },
{ 21, 21, REG_TYPE_BOOL },
{ 28, 28, REG_TYPE_BOOL },
@@ -1307,16 +1307,16 @@ static struct reg_data_type_flags_field aarch64_cpsr_fields[] = {
{ "SP", aarch64_cpsr_bits + 0, aarch64_cpsr_fields + 1 },
{ "EL", aarch64_cpsr_bits + 1, aarch64_cpsr_fields + 2 },
{ "nRW", aarch64_cpsr_bits + 2, aarch64_cpsr_fields + 3 },
{ "F" , aarch64_cpsr_bits + 3, aarch64_cpsr_fields + 4 },
{ "I" , aarch64_cpsr_bits + 4, aarch64_cpsr_fields + 5 },
{ "A" , aarch64_cpsr_bits + 5, aarch64_cpsr_fields + 6 },
{ "D" , aarch64_cpsr_bits + 6, aarch64_cpsr_fields + 7 },
{ "IL" , aarch64_cpsr_bits + 7, aarch64_cpsr_fields + 8 },
{ "SS" , aarch64_cpsr_bits + 8, aarch64_cpsr_fields + 9 },
{ "V" , aarch64_cpsr_bits + 9, aarch64_cpsr_fields + 10 },
{ "C" , aarch64_cpsr_bits + 10, aarch64_cpsr_fields + 11 },
{ "Z" , aarch64_cpsr_bits + 11, aarch64_cpsr_fields + 12 },
{ "N" , aarch64_cpsr_bits + 12, NULL }
{ "F", aarch64_cpsr_bits + 3, aarch64_cpsr_fields + 4 },
{ "I", aarch64_cpsr_bits + 4, aarch64_cpsr_fields + 5 },
{ "A", aarch64_cpsr_bits + 5, aarch64_cpsr_fields + 6 },
{ "D", aarch64_cpsr_bits + 6, aarch64_cpsr_fields + 7 },
{ "IL", aarch64_cpsr_bits + 7, aarch64_cpsr_fields + 8 },
{ "SS", aarch64_cpsr_bits + 8, aarch64_cpsr_fields + 9 },
{ "V", aarch64_cpsr_bits + 9, aarch64_cpsr_fields + 10 },
{ "C", aarch64_cpsr_bits + 10, aarch64_cpsr_fields + 11 },
{ "Z", aarch64_cpsr_bits + 11, aarch64_cpsr_fields + 12 },
{ "N", aarch64_cpsr_bits + 12, NULL }
};

static struct reg_data_type_flags aarch64_cpsr_flags[] = {


+ 2
- 2
src/target/dsp563xx.h View File

@@ -46,8 +46,8 @@ struct dsp563xx_common {
struct once_reg once_regs[DSP563XX_NUMONCEREGS];

/* register cache to processor synchronization */
int (*read_core_reg) (struct target *target, int num);
int (*write_core_reg) (struct target *target, int num);
int (*read_core_reg)(struct target *target, int num);
int (*write_core_reg)(struct target *target, int num);

struct hardware_breakpoint hardware_breakpoint[1];



+ 1
- 1
src/target/mips32.c View File

@@ -226,7 +226,7 @@ static int mips32_write_core_reg(struct target *target, unsigned int num)

reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
mips32->core_regs[num] = reg_value;
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
mips32->core_cache->reg_list[num].valid = true;
mips32->core_cache->reg_list[num].dirty = false;



+ 1
- 1
src/target/mips64.c View File

@@ -283,7 +283,7 @@ static int mips64_write_core_reg(struct target *target, int num)

reg_value = buf_get_u64(mips64->core_cache->reg_list[num].value, 0, 64);
mips64->core_regs[num] = reg_value;
LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num , reg_value);
LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num, reg_value);
mips64->core_cache->reg_list[num].valid = 1;
mips64->core_cache->reg_list[num].dirty = 0;



+ 4
- 4
src/target/nds32.c View File

@@ -1711,8 +1711,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng
/* (address + length - 1) / dcache_line_size */
end_line = (address + length - 1) >> (dcache->line_size + 2);

for (cur_address = address, cur_line = start_line ;
cur_line <= end_line ;
for (cur_address = address, cur_line = start_line;
cur_line <= end_line;
cur_address += dcache_line_size, cur_line++) {
/* D$ write back */
result = aice_cache_ctl(aice, AICE_CACHE_CTL_L1D_VA_WB, cur_address);
@@ -1732,8 +1732,8 @@ int nds32_cache_sync(struct target *target, target_addr_t address, uint32_t leng
/* (address + length - 1) / icache_line_size */
end_line = (address + length - 1) >> (icache->line_size + 2);

for (cur_address = address, cur_line = start_line ;
cur_line <= end_line ;
for (cur_address = address, cur_line = start_line;
cur_line <= end_line;
cur_address += icache_line_size, cur_line++) {
/* Because PSW.IT is turned off under debug exception, address MUST
* be physical address. L1I_VA_INVALIDATE uses PSW.IT to decide


+ 183
- 183
src/target/openrisc/or1k.c View File

@@ -50,186 +50,186 @@ static int or1k_write_core_reg(struct target *target, int num);
static struct or1k_core_reg *or1k_core_reg_list_arch_info;

static const struct or1k_core_reg_init or1k_init_reg_list[] = {
{"r0" , GROUP0 + 1024, "org.gnu.gdb.or1k.group0", NULL},
{"r1" , GROUP0 + 1025, "org.gnu.gdb.or1k.group0", NULL},
{"r2" , GROUP0 + 1026, "org.gnu.gdb.or1k.group0", NULL},
{"r3" , GROUP0 + 1027, "org.gnu.gdb.or1k.group0", NULL},
{"r4" , GROUP0 + 1028, "org.gnu.gdb.or1k.group0", NULL},
{"r5" , GROUP0 + 1029, "org.gnu.gdb.or1k.group0", NULL},
{"r6" , GROUP0 + 1030, "org.gnu.gdb.or1k.group0", NULL},
{"r7" , GROUP0 + 1031, "org.gnu.gdb.or1k.group0", NULL},
{"r8" , GROUP0 + 1032, "org.gnu.gdb.or1k.group0", NULL},
{"r9" , GROUP0 + 1033, "org.gnu.gdb.or1k.group0", NULL},
{"r10" , GROUP0 + 1034, "org.gnu.gdb.or1k.group0", NULL},
{"r11" , GROUP0 + 1035, "org.gnu.gdb.or1k.group0", NULL},
{"r12" , GROUP0 + 1036, "org.gnu.gdb.or1k.group0", NULL},
{"r13" , GROUP0 + 1037, "org.gnu.gdb.or1k.group0", NULL},
{"r14" , GROUP0 + 1038, "org.gnu.gdb.or1k.group0", NULL},
{"r15" , GROUP0 + 1039, "org.gnu.gdb.or1k.group0", NULL},
{"r16" , GROUP0 + 1040, "org.gnu.gdb.or1k.group0", NULL},
{"r17" , GROUP0 + 1041, "org.gnu.gdb.or1k.group0", NULL},
{"r18" , GROUP0 + 1042, "org.gnu.gdb.or1k.group0", NULL},
{"r19" , GROUP0 + 1043, "org.gnu.gdb.or1k.group0", NULL},
{"r20" , GROUP0 + 1044, "org.gnu.gdb.or1k.group0", NULL},
{"r21" , GROUP0 + 1045, "org.gnu.gdb.or1k.group0", NULL},
{"r22" , GROUP0 + 1046, "org.gnu.gdb.or1k.group0", NULL},
{"r23" , GROUP0 + 1047, "org.gnu.gdb.or1k.group0", NULL},
{"r24" , GROUP0 + 1048, "org.gnu.gdb.or1k.group0", NULL},
{"r25" , GROUP0 + 1049, "org.gnu.gdb.or1k.group0", NULL},
{"r26" , GROUP0 + 1050, "org.gnu.gdb.or1k.group0", NULL},
{"r27" , GROUP0 + 1051, "org.gnu.gdb.or1k.group0", NULL},
{"r28" , GROUP0 + 1052, "org.gnu.gdb.or1k.group0", NULL},
{"r29" , GROUP0 + 1053, "org.gnu.gdb.or1k.group0", NULL},
{"r30" , GROUP0 + 1054, "org.gnu.gdb.or1k.group0", NULL},
{"r31" , GROUP0 + 1055, "org.gnu.gdb.or1k.group0", NULL},
{"ppc" , GROUP0 + 18, "org.gnu.gdb.or1k.group0", NULL},
{"npc" , GROUP0 + 16, "org.gnu.gdb.or1k.group0", NULL},
{"sr" , GROUP0 + 17, "org.gnu.gdb.or1k.group0", NULL},
{"vr" , GROUP0 + 0, "org.gnu.gdb.or1k.group0", "system"},
{"upr" , GROUP0 + 1, "org.gnu.gdb.or1k.group0", "system"},
{"cpucfgr" , GROUP0 + 2, "org.gnu.gdb.or1k.group0", "system"},
{"dmmucfgr" , GROUP0 + 3, "org.gnu.gdb.or1k.group0", "system"},
{"immucfgr" , GROUP0 + 4, "org.gnu.gdb.or1k.group0", "system"},
{"dccfgr" , GROUP0 + 5, "org.gnu.gdb.or1k.group0", "system"},
{"iccfgr" , GROUP0 + 6, "org.gnu.gdb.or1k.group0", "system"},
{"dcfgr" , GROUP0 + 7, "org.gnu.gdb.or1k.group0", "system"},
{"pccfgr" , GROUP0 + 8, "org.gnu.gdb.or1k.group0", "system"},
{"fpcsr" , GROUP0 + 20, "org.gnu.gdb.or1k.group0", "system"},
{"epcr0" , GROUP0 + 32, "org.gnu.gdb.or1k.group0", "system"},
{"epcr1" , GROUP0 + 33, "org.gnu.gdb.or1k.group0", "system"},
{"epcr2" , GROUP0 + 34, "org.gnu.gdb.or1k.group0", "system"},
{"epcr3" , GROUP0 + 35, "org.gnu.gdb.or1k.group0", "system"},
{"epcr4" , GROUP0 + 36, "org.gnu.gdb.or1k.group0", "system"},
{"epcr5" , GROUP0 + 37, "org.gnu.gdb.or1k.group0", "system"},
{"epcr6" , GROUP0 + 38, "org.gnu.gdb.or1k.group0", "system"},
{"epcr7" , GROUP0 + 39, "org.gnu.gdb.or1k.group0", "system"},
{"epcr8" , GROUP0 + 40, "org.gnu.gdb.or1k.group0", "system"},
{"epcr9" , GROUP0 + 41, "org.gnu.gdb.or1k.group0", "system"},
{"epcr10" , GROUP0 + 42, "org.gnu.gdb.or1k.group0", "system"},
{"epcr11" , GROUP0 + 43, "org.gnu.gdb.or1k.group0", "system"},
{"epcr12" , GROUP0 + 44, "org.gnu.gdb.or1k.group0", "system"},
{"epcr13" , GROUP0 + 45, "org.gnu.gdb.or1k.group0", "system"},
{"epcr14" , GROUP0 + 46, "org.gnu.gdb.or1k.group0", "system"},
{"epcr15" , GROUP0 + 47, "org.gnu.gdb.or1k.group0", "system"},
{"eear0" , GROUP0 + 48, "org.gnu.gdb.or1k.group0", "system"},
{"eear1" , GROUP0 + 49, "org.gnu.gdb.or1k.group0", "system"},
{"eear2" , GROUP0 + 50, "org.gnu.gdb.or1k.group0", "system"},
{"eear3" , GROUP0 + 51, "org.gnu.gdb.or1k.group0", "system"},
{"eear4" , GROUP0 + 52, "org.gnu.gdb.or1k.group0", "system"},
{"eear5" , GROUP0 + 53, "org.gnu.gdb.or1k.group0", "system"},
{"eear6" , GROUP0 + 54, "org.gnu.gdb.or1k.group0", "system"},
{"eear7" , GROUP0 + 55, "org.gnu.gdb.or1k.group0", "system"},
{"eear8" , GROUP0 + 56, "org.gnu.gdb.or1k.group0", "system"},
{"eear9" , GROUP0 + 57, "org.gnu.gdb.or1k.group0", "system"},
{"eear10" , GROUP0 + 58, "org.gnu.gdb.or1k.group0", "system"},
{"eear11" , GROUP0 + 59, "org.gnu.gdb.or1k.group0", "system"},
{"eear12" , GROUP0 + 60, "org.gnu.gdb.or1k.group0", "system"},
{"eear13" , GROUP0 + 61, "org.gnu.gdb.or1k.group0", "system"},
{"eear14" , GROUP0 + 62, "org.gnu.gdb.or1k.group0", "system"},
{"eear15" , GROUP0 + 63, "org.gnu.gdb.or1k.group0", "system"},
{"esr0" , GROUP0 + 64, "org.gnu.gdb.or1k.group0", "system"},
{"esr1" , GROUP0 + 65, "org.gnu.gdb.or1k.group0", "system"},
{"esr2" , GROUP0 + 66, "org.gnu.gdb.or1k.group0", "system"},
{"esr3" , GROUP0 + 67, "org.gnu.gdb.or1k.group0", "system"},
{"esr4" , GROUP0 + 68, "org.gnu.gdb.or1k.group0", "system"},
{"esr5" , GROUP0 + 69, "org.gnu.gdb.or1k.group0", "system"},
{"esr6" , GROUP0 + 70, "org.gnu.gdb.or1k.group0", "system"},
{"esr7" , GROUP0 + 71, "org.gnu.gdb.or1k.group0", "system"},
{"esr8" , GROUP0 + 72, "org.gnu.gdb.or1k.group0", "system"},
{"esr9" , GROUP0 + 73, "org.gnu.gdb.or1k.group0", "system"},
{"esr10" , GROUP0 + 74, "org.gnu.gdb.or1k.group0", "system"},
{"esr11" , GROUP0 + 75, "org.gnu.gdb.or1k.group0", "system"},
{"esr12" , GROUP0 + 76, "org.gnu.gdb.or1k.group0", "system"},
{"esr13" , GROUP0 + 77, "org.gnu.gdb.or1k.group0", "system"},
{"esr14" , GROUP0 + 78, "org.gnu.gdb.or1k.group0", "system"},
{"esr15" , GROUP0 + 79, "org.gnu.gdb.or1k.group0", "system"},
{"dmmuucr" , GROUP1 + 0, "org.gnu.gdb.or1k.group1", "dmmu"},
{"dmmuupr" , GROUP1 + 1, "org.gnu.gdb.or1k.group1", "dmmu"},
{"dtlbeir" , GROUP1 + 2, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr0" , GROUP1 + 4, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr1" , GROUP1 + 5, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr2" , GROUP1 + 6, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr3" , GROUP1 + 7, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr0" , GROUP1 + 8, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr1" , GROUP1 + 9, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr2" , GROUP1 + 10, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr3" , GROUP1 + 11, "org.gnu.gdb.or1k.group1", "dmmu"},
{"immucr" , GROUP2 + 0, "org.gnu.gdb.or1k.group2", "immu"},
{"immupr" , GROUP2 + 1, "org.gnu.gdb.or1k.group2", "immu"},
{"itlbeir" , GROUP2 + 2, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr0" , GROUP2 + 4, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr1" , GROUP2 + 5, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr2" , GROUP2 + 6, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr3" , GROUP2 + 7, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr0" , GROUP2 + 8, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr1" , GROUP2 + 9, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr2" , GROUP2 + 10, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr3" , GROUP2 + 11, "org.gnu.gdb.or1k.group2", "immu"},
{"dccr" , GROUP3 + 0, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbpr" , GROUP3 + 1, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbfr" , GROUP3 + 2, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbir" , GROUP3 + 3, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbwr" , GROUP3 + 4, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcblr" , GROUP3 + 5, "org.gnu.gdb.or1k.group3", "dcache"},
{"iccr" , GROUP4 + 0, "org.gnu.gdb.or1k.group4", "icache"},
{"icbpr" , GROUP4 + 1, "org.gnu.gdb.or1k.group4", "icache"},
{"icbir" , GROUP4 + 2, "org.gnu.gdb.or1k.group4", "icache"},
{"icblr" , GROUP4 + 3, "org.gnu.gdb.or1k.group4", "icache"},
{"maclo" , GROUP5 + 0, "org.gnu.gdb.or1k.group5", "mac"},
{"machi" , GROUP5 + 1, "org.gnu.gdb.or1k.group5", "mac"},
{"dvr0" , GROUP6 + 0, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr1" , GROUP6 + 1, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr2" , GROUP6 + 2, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr3" , GROUP6 + 3, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr4" , GROUP6 + 4, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr5" , GROUP6 + 5, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr6" , GROUP6 + 6, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr7" , GROUP6 + 7, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr0" , GROUP6 + 8, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr1" , GROUP6 + 9, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr2" , GROUP6 + 10, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr3" , GROUP6 + 11, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr4" , GROUP6 + 12, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr5" , GROUP6 + 13, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr6" , GROUP6 + 14, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr7" , GROUP6 + 15, "org.gnu.gdb.or1k.group6", "debug"},
{"dmr1" , GROUP6 + 16, "org.gnu.gdb.or1k.group6", "debug"},
{"dmr2" , GROUP6 + 17, "org.gnu.gdb.or1k.group6", "debug"},
{"dcwr0" , GROUP6 + 18, "org.gnu.gdb.or1k.group6", "debug"},
{"dcwr1" , GROUP6 + 19, "org.gnu.gdb.or1k.group6", "debug"},
{"dsr" , GROUP6 + 20, "org.gnu.gdb.or1k.group6", "debug"},
{"drr" , GROUP6 + 21, "org.gnu.gdb.or1k.group6", "debug"},
{"pccr0" , GROUP7 + 0, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr1" , GROUP7 + 1, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr2" , GROUP7 + 2, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr3" , GROUP7 + 3, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr4" , GROUP7 + 4, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr5" , GROUP7 + 5, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr6" , GROUP7 + 6, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr7" , GROUP7 + 7, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr0" , GROUP7 + 8, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr1" , GROUP7 + 9, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr2" , GROUP7 + 10, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr3" , GROUP7 + 11, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr4" , GROUP7 + 12, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr5" , GROUP7 + 13, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr6" , GROUP7 + 14, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr7" , GROUP7 + 15, "org.gnu.gdb.or1k.group7", "perf"},
{"pmr" , GROUP8 + 0, "org.gnu.gdb.or1k.group8", "power"},
{"picmr" , GROUP9 + 0, "org.gnu.gdb.or1k.group9", "pic"},
{"picsr" , GROUP9 + 2, "org.gnu.gdb.or1k.group9", "pic"},
{"ttmr" , GROUP10 + 0, "org.gnu.gdb.or1k.group10", "timer"},
{"ttcr" , GROUP10 + 1, "org.gnu.gdb.or1k.group10", "timer"},
{"r0", GROUP0 + 1024, "org.gnu.gdb.or1k.group0", NULL},
{"r1", GROUP0 + 1025, "org.gnu.gdb.or1k.group0", NULL},
{"r2", GROUP0 + 1026, "org.gnu.gdb.or1k.group0", NULL},
{"r3", GROUP0 + 1027, "org.gnu.gdb.or1k.group0", NULL},
{"r4", GROUP0 + 1028, "org.gnu.gdb.or1k.group0", NULL},
{"r5", GROUP0 + 1029, "org.gnu.gdb.or1k.group0", NULL},
{"r6", GROUP0 + 1030, "org.gnu.gdb.or1k.group0", NULL},
{"r7", GROUP0 + 1031, "org.gnu.gdb.or1k.group0", NULL},
{"r8", GROUP0 + 1032, "org.gnu.gdb.or1k.group0", NULL},
{"r9", GROUP0 + 1033, "org.gnu.gdb.or1k.group0", NULL},
{"r10", GROUP0 + 1034, "org.gnu.gdb.or1k.group0", NULL},
{"r11", GROUP0 + 1035, "org.gnu.gdb.or1k.group0", NULL},
{"r12", GROUP0 + 1036, "org.gnu.gdb.or1k.group0", NULL},
{"r13", GROUP0 + 1037, "org.gnu.gdb.or1k.group0", NULL},
{"r14", GROUP0 + 1038, "org.gnu.gdb.or1k.group0", NULL},
{"r15", GROUP0 + 1039, "org.gnu.gdb.or1k.group0", NULL},
{"r16", GROUP0 + 1040, "org.gnu.gdb.or1k.group0", NULL},
{"r17", GROUP0 + 1041, "org.gnu.gdb.or1k.group0", NULL},
{"r18", GROUP0 + 1042, "org.gnu.gdb.or1k.group0", NULL},
{"r19", GROUP0 + 1043, "org.gnu.gdb.or1k.group0", NULL},
{"r20", GROUP0 + 1044, "org.gnu.gdb.or1k.group0", NULL},
{"r21", GROUP0 + 1045, "org.gnu.gdb.or1k.group0", NULL},
{"r22", GROUP0 + 1046, "org.gnu.gdb.or1k.group0", NULL},
{"r23", GROUP0 + 1047, "org.gnu.gdb.or1k.group0", NULL},
{"r24", GROUP0 + 1048, "org.gnu.gdb.or1k.group0", NULL},
{"r25", GROUP0 + 1049, "org.gnu.gdb.or1k.group0", NULL},
{"r26", GROUP0 + 1050, "org.gnu.gdb.or1k.group0", NULL},
{"r27", GROUP0 + 1051, "org.gnu.gdb.or1k.group0", NULL},
{"r28", GROUP0 + 1052, "org.gnu.gdb.or1k.group0", NULL},
{"r29", GROUP0 + 1053, "org.gnu.gdb.or1k.group0", NULL},
{"r30", GROUP0 + 1054, "org.gnu.gdb.or1k.group0", NULL},
{"r31", GROUP0 + 1055, "org.gnu.gdb.or1k.group0", NULL},
{"ppc", GROUP0 + 18, "org.gnu.gdb.or1k.group0", NULL},
{"npc", GROUP0 + 16, "org.gnu.gdb.or1k.group0", NULL},
{"sr", GROUP0 + 17, "org.gnu.gdb.or1k.group0", NULL},
{"vr", GROUP0 + 0, "org.gnu.gdb.or1k.group0", "system"},
{"upr", GROUP0 + 1, "org.gnu.gdb.or1k.group0", "system"},
{"cpucfgr", GROUP0 + 2, "org.gnu.gdb.or1k.group0", "system"},
{"dmmucfgr", GROUP0 + 3, "org.gnu.gdb.or1k.group0", "system"},
{"immucfgr", GROUP0 + 4, "org.gnu.gdb.or1k.group0", "system"},
{"dccfgr", GROUP0 + 5, "org.gnu.gdb.or1k.group0", "system"},
{"iccfgr", GROUP0 + 6, "org.gnu.gdb.or1k.group0", "system"},
{"dcfgr", GROUP0 + 7, "org.gnu.gdb.or1k.group0", "system"},
{"pccfgr", GROUP0 + 8, "org.gnu.gdb.or1k.group0", "system"},
{"fpcsr", GROUP0 + 20, "org.gnu.gdb.or1k.group0", "system"},
{"epcr0", GROUP0 + 32, "org.gnu.gdb.or1k.group0", "system"},
{"epcr1", GROUP0 + 33, "org.gnu.gdb.or1k.group0", "system"},
{"epcr2", GROUP0 + 34, "org.gnu.gdb.or1k.group0", "system"},
{"epcr3", GROUP0 + 35, "org.gnu.gdb.or1k.group0", "system"},
{"epcr4", GROUP0 + 36, "org.gnu.gdb.or1k.group0", "system"},
{"epcr5", GROUP0 + 37, "org.gnu.gdb.or1k.group0", "system"},
{"epcr6", GROUP0 + 38, "org.gnu.gdb.or1k.group0", "system"},
{"epcr7", GROUP0 + 39, "org.gnu.gdb.or1k.group0", "system"},
{"epcr8", GROUP0 + 40, "org.gnu.gdb.or1k.group0", "system"},
{"epcr9", GROUP0 + 41, "org.gnu.gdb.or1k.group0", "system"},
{"epcr10", GROUP0 + 42, "org.gnu.gdb.or1k.group0", "system"},
{"epcr11", GROUP0 + 43, "org.gnu.gdb.or1k.group0", "system"},
{"epcr12", GROUP0 + 44, "org.gnu.gdb.or1k.group0", "system"},
{"epcr13", GROUP0 + 45, "org.gnu.gdb.or1k.group0", "system"},
{"epcr14", GROUP0 + 46, "org.gnu.gdb.or1k.group0", "system"},
{"epcr15", GROUP0 + 47, "org.gnu.gdb.or1k.group0", "system"},
{"eear0", GROUP0 + 48, "org.gnu.gdb.or1k.group0", "system"},
{"eear1", GROUP0 + 49, "org.gnu.gdb.or1k.group0", "system"},
{"eear2", GROUP0 + 50, "org.gnu.gdb.or1k.group0", "system"},
{"eear3", GROUP0 + 51, "org.gnu.gdb.or1k.group0", "system"},
{"eear4", GROUP0 + 52, "org.gnu.gdb.or1k.group0", "system"},
{"eear5", GROUP0 + 53, "org.gnu.gdb.or1k.group0", "system"},
{"eear6", GROUP0 + 54, "org.gnu.gdb.or1k.group0", "system"},
{"eear7", GROUP0 + 55, "org.gnu.gdb.or1k.group0", "system"},
{"eear8", GROUP0 + 56, "org.gnu.gdb.or1k.group0", "system"},
{"eear9", GROUP0 + 57, "org.gnu.gdb.or1k.group0", "system"},
{"eear10", GROUP0 + 58, "org.gnu.gdb.or1k.group0", "system"},
{"eear11", GROUP0 + 59, "org.gnu.gdb.or1k.group0", "system"},
{"eear12", GROUP0 + 60, "org.gnu.gdb.or1k.group0", "system"},
{"eear13", GROUP0 + 61, "org.gnu.gdb.or1k.group0", "system"},
{"eear14", GROUP0 + 62, "org.gnu.gdb.or1k.group0", "system"},
{"eear15", GROUP0 + 63, "org.gnu.gdb.or1k.group0", "system"},
{"esr0", GROUP0 + 64, "org.gnu.gdb.or1k.group0", "system"},
{"esr1", GROUP0 + 65, "org.gnu.gdb.or1k.group0", "system"},
{"esr2", GROUP0 + 66, "org.gnu.gdb.or1k.group0", "system"},
{"esr3", GROUP0 + 67, "org.gnu.gdb.or1k.group0", "system"},
{"esr4", GROUP0 + 68, "org.gnu.gdb.or1k.group0", "system"},
{"esr5", GROUP0 + 69, "org.gnu.gdb.or1k.group0", "system"},
{"esr6", GROUP0 + 70, "org.gnu.gdb.or1k.group0", "system"},
{"esr7", GROUP0 + 71, "org.gnu.gdb.or1k.group0", "system"},
{"esr8", GROUP0 + 72, "org.gnu.gdb.or1k.group0", "system"},
{"esr9", GROUP0 + 73, "org.gnu.gdb.or1k.group0", "system"},
{"esr10", GROUP0 + 74, "org.gnu.gdb.or1k.group0", "system"},
{"esr11", GROUP0 + 75, "org.gnu.gdb.or1k.group0", "system"},
{"esr12", GROUP0 + 76, "org.gnu.gdb.or1k.group0", "system"},
{"esr13", GROUP0 + 77, "org.gnu.gdb.or1k.group0", "system"},
{"esr14", GROUP0 + 78, "org.gnu.gdb.or1k.group0", "system"},
{"esr15", GROUP0 + 79, "org.gnu.gdb.or1k.group0", "system"},
{"dmmuucr", GROUP1 + 0, "org.gnu.gdb.or1k.group1", "dmmu"},
{"dmmuupr", GROUP1 + 1, "org.gnu.gdb.or1k.group1", "dmmu"},
{"dtlbeir", GROUP1 + 2, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr0", GROUP1 + 4, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr1", GROUP1 + 5, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr2", GROUP1 + 6, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbmr3", GROUP1 + 7, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr0", GROUP1 + 8, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr1", GROUP1 + 9, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr2", GROUP1 + 10, "org.gnu.gdb.or1k.group1", "dmmu"},
{"datbtr3", GROUP1 + 11, "org.gnu.gdb.or1k.group1", "dmmu"},
{"immucr", GROUP2 + 0, "org.gnu.gdb.or1k.group2", "immu"},
{"immupr", GROUP2 + 1, "org.gnu.gdb.or1k.group2", "immu"},
{"itlbeir", GROUP2 + 2, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr0", GROUP2 + 4, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr1", GROUP2 + 5, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr2", GROUP2 + 6, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbmr3", GROUP2 + 7, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr0", GROUP2 + 8, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr1", GROUP2 + 9, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr2", GROUP2 + 10, "org.gnu.gdb.or1k.group2", "immu"},
{"iatbtr3", GROUP2 + 11, "org.gnu.gdb.or1k.group2", "immu"},
{"dccr", GROUP3 + 0, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbpr", GROUP3 + 1, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbfr", GROUP3 + 2, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbir", GROUP3 + 3, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcbwr", GROUP3 + 4, "org.gnu.gdb.or1k.group3", "dcache"},
{"dcblr", GROUP3 + 5, "org.gnu.gdb.or1k.group3", "dcache"},
{"iccr", GROUP4 + 0, "org.gnu.gdb.or1k.group4", "icache"},
{"icbpr", GROUP4 + 1, "org.gnu.gdb.or1k.group4", "icache"},
{"icbir", GROUP4 + 2, "org.gnu.gdb.or1k.group4", "icache"},
{"icblr", GROUP4 + 3, "org.gnu.gdb.or1k.group4", "icache"},
{"maclo", GROUP5 + 0, "org.gnu.gdb.or1k.group5", "mac"},
{"machi", GROUP5 + 1, "org.gnu.gdb.or1k.group5", "mac"},
{"dvr0", GROUP6 + 0, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr1", GROUP6 + 1, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr2", GROUP6 + 2, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr3", GROUP6 + 3, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr4", GROUP6 + 4, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr5", GROUP6 + 5, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr6", GROUP6 + 6, "org.gnu.gdb.or1k.group6", "debug"},
{"dvr7", GROUP6 + 7, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr0", GROUP6 + 8, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr1", GROUP6 + 9, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr2", GROUP6 + 10, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr3", GROUP6 + 11, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr4", GROUP6 + 12, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr5", GROUP6 + 13, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr6", GROUP6 + 14, "org.gnu.gdb.or1k.group6", "debug"},
{"dcr7", GROUP6 + 15, "org.gnu.gdb.or1k.group6", "debug"},
{"dmr1", GROUP6 + 16, "org.gnu.gdb.or1k.group6", "debug"},
{"dmr2", GROUP6 + 17, "org.gnu.gdb.or1k.group6", "debug"},
{"dcwr0", GROUP6 + 18, "org.gnu.gdb.or1k.group6", "debug"},
{"dcwr1", GROUP6 + 19, "org.gnu.gdb.or1k.group6", "debug"},
{"dsr", GROUP6 + 20, "org.gnu.gdb.or1k.group6", "debug"},
{"drr", GROUP6 + 21, "org.gnu.gdb.or1k.group6", "debug"},
{"pccr0", GROUP7 + 0, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr1", GROUP7 + 1, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr2", GROUP7 + 2, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr3", GROUP7 + 3, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr4", GROUP7 + 4, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr5", GROUP7 + 5, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr6", GROUP7 + 6, "org.gnu.gdb.or1k.group7", "perf"},
{"pccr7", GROUP7 + 7, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr0", GROUP7 + 8, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr1", GROUP7 + 9, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr2", GROUP7 + 10, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr3", GROUP7 + 11, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr4", GROUP7 + 12, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr5", GROUP7 + 13, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr6", GROUP7 + 14, "org.gnu.gdb.or1k.group7", "perf"},
{"pcmr7", GROUP7 + 15, "org.gnu.gdb.or1k.group7", "perf"},
{"pmr", GROUP8 + 0, "org.gnu.gdb.or1k.group8", "power"},
{"picmr", GROUP9 + 0, "org.gnu.gdb.or1k.group9", "pic"},
{"picsr", GROUP9 + 2, "org.gnu.gdb.or1k.group9", "pic"},
{"ttmr", GROUP10 + 0, "org.gnu.gdb.or1k.group10", "timer"},
{"ttcr", GROUP10 + 1, "org.gnu.gdb.or1k.group10", "timer"},
};

static int or1k_add_reg(struct target *target, struct or1k_core_reg *new_reg)
@@ -423,7 +423,7 @@ static int or1k_read_core_reg(struct target *target, int num)
if ((num >= 0) && (num < OR1KNUMCOREREGS)) {
reg_value = or1k->core_regs[num];
buf_set_u32(or1k->core_cache->reg_list[num].value, 0, 32, reg_value);
LOG_DEBUG("Read core reg %i value 0x%08" PRIx32, num , reg_value);
LOG_DEBUG("Read core reg %i value 0x%08" PRIx32, num, reg_value);
or1k->core_cache->reg_list[num].valid = true;
or1k->core_cache->reg_list[num].dirty = false;
} else {
@@ -435,7 +435,7 @@ static int or1k_read_core_reg(struct target *target, int num)
return retval;
}
buf_set_u32(or1k->core_cache->reg_list[num].value, 0, 32, reg_value);
LOG_DEBUG("Read spr reg %i value 0x%08" PRIx32, num , reg_value);
LOG_DEBUG("Read spr reg %i value 0x%08" PRIx32, num, reg_value);
}

return ERROR_OK;
@@ -452,7 +452,7 @@ static int or1k_write_core_reg(struct target *target, int num)

uint32_t reg_value = buf_get_u32(or1k->core_cache->reg_list[num].value, 0, 32);
or1k->core_regs[num] = reg_value;
LOG_DEBUG("Write core reg %i value 0x%08" PRIx32, num , reg_value);
LOG_DEBUG("Write core reg %i value 0x%08" PRIx32, num, reg_value);
or1k->core_cache->reg_list[num].valid = true;
or1k->core_cache->reg_list[num].dirty = false;



+ 2
- 2
src/target/stm8.c View File

@@ -1143,7 +1143,7 @@ static int stm8_read_core_reg(struct target *target, unsigned int num)
return ERROR_COMMAND_SYNTAX_ERROR;

reg_value = stm8->core_regs[num];
LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num , reg_value);
LOG_DEBUG("read core reg %i value 0x%" PRIx32 "", num, reg_value);
buf_set_u32(stm8->core_cache->reg_list[num].value, 0, 32, reg_value);
stm8->core_cache->reg_list[num].valid = true;
stm8->core_cache->reg_list[num].dirty = false;
@@ -1163,7 +1163,7 @@ static int stm8_write_core_reg(struct target *target, unsigned int num)

reg_value = buf_get_u32(stm8->core_cache->reg_list[num].value, 0, 32);
stm8->core_regs[num] = reg_value;
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num, reg_value);
stm8->core_cache->reg_list[num].valid = true;
stm8->core_cache->reg_list[num].dirty = false;



+ 20
- 20
src/target/target.c View File

@@ -176,10 +176,10 @@ static const Jim_Nvp nvp_error_target[] = {
{ .value = ERROR_TARGET_TIMEOUT, .name = "err-timeout" },
{ .value = ERROR_TARGET_NOT_HALTED, .name = "err-not-halted" },
{ .value = ERROR_TARGET_FAILURE, .name = "err-failure" },
{ .value = ERROR_TARGET_UNALIGNED_ACCESS , .name = "err-unaligned-access" },
{ .value = ERROR_TARGET_DATA_ABORT , .name = "err-data-abort" },
{ .value = ERROR_TARGET_RESOURCE_NOT_AVAILABLE , .name = "err-resource-not-available" },
{ .value = ERROR_TARGET_TRANSLATION_FAULT , .name = "err-translation-fault" },
{ .value = ERROR_TARGET_UNALIGNED_ACCESS, .name = "err-unaligned-access" },
{ .value = ERROR_TARGET_DATA_ABORT, .name = "err-data-abort" },
{ .value = ERROR_TARGET_RESOURCE_NOT_AVAILABLE, .name = "err-resource-not-available" },
{ .value = ERROR_TARGET_TRANSLATION_FAULT, .name = "err-translation-fault" },
{ .value = ERROR_TARGET_NOT_RUNNING, .name = "err-not-running" },
{ .value = ERROR_TARGET_NOT_EXAMINED, .name = "err-not-examined" },
{ .value = -1, .name = NULL }
@@ -229,10 +229,10 @@ static const Jim_Nvp nvp_target_event[] = {
{ .value = TARGET_EVENT_GDB_DETACH, .name = "gdb-detach" },

{ .value = TARGET_EVENT_GDB_FLASH_WRITE_START, .name = "gdb-flash-write-start" },
{ .value = TARGET_EVENT_GDB_FLASH_WRITE_END , .name = "gdb-flash-write-end" },
{ .value = TARGET_EVENT_GDB_FLASH_WRITE_END, .name = "gdb-flash-write-end" },

{ .value = TARGET_EVENT_GDB_FLASH_ERASE_START, .name = "gdb-flash-erase-start" },
{ .value = TARGET_EVENT_GDB_FLASH_ERASE_END , .name = "gdb-flash-erase-end" },
{ .value = TARGET_EVENT_GDB_FLASH_ERASE_END, .name = "gdb-flash-erase-end" },

{ .value = TARGET_EVENT_TRACE_CONFIG, .name = "trace-config" },

@@ -249,15 +249,15 @@ static const Jim_Nvp nvp_target_state[] = {
};

static const Jim_Nvp nvp_target_debug_reason[] = {
{ .name = "debug-request" , .value = DBG_REASON_DBGRQ },
{ .name = "breakpoint" , .value = DBG_REASON_BREAKPOINT },
{ .name = "watchpoint" , .value = DBG_REASON_WATCHPOINT },
{ .name = "debug-request", .value = DBG_REASON_DBGRQ },
{ .name = "breakpoint", .value = DBG_REASON_BREAKPOINT },
{ .name = "watchpoint", .value = DBG_REASON_WATCHPOINT },
{ .name = "watchpoint-and-breakpoint", .value = DBG_REASON_WPTANDBKPT },
{ .name = "single-step" , .value = DBG_REASON_SINGLESTEP },
{ .name = "target-not-halted" , .value = DBG_REASON_NOTHALTED },
{ .name = "program-exit" , .value = DBG_REASON_EXIT },
{ .name = "exception-catch" , .value = DBG_REASON_EXC_CATCH },
{ .name = "undefined" , .value = DBG_REASON_UNDEFINED },
{ .name = "single-step", .value = DBG_REASON_SINGLESTEP },
{ .name = "target-not-halted", .value = DBG_REASON_NOTHALTED },
{ .name = "program-exit", .value = DBG_REASON_EXIT },
{ .name = "exception-catch", .value = DBG_REASON_EXC_CATCH },
{ .name = "undefined", .value = DBG_REASON_UNDEFINED },
{ .name = NULL, .value = -1 },
};

@@ -271,10 +271,10 @@ static const Jim_Nvp nvp_target_endian[] = {

static const Jim_Nvp nvp_reset_modes[] = {
{ .name = "unknown", .value = RESET_UNKNOWN },
{ .name = "run" , .value = RESET_RUN },
{ .name = "halt" , .value = RESET_HALT },
{ .name = "init" , .value = RESET_INIT },
{ .name = NULL , .value = -1 },
{ .name = "run", .value = RESET_RUN },
{ .name = "halt", .value = RESET_HALT },
{ .name = "init", .value = RESET_INIT },
{ .name = NULL, .value = -1 },
};

const char *debug_reason_name(struct target *t)
@@ -2892,7 +2892,7 @@ COMMAND_HANDLER(handle_reg_command)
} else {
command_print(CMD, "(%i) %s (/%" PRIu32 ")",
count, reg->name,
reg->size) ;
reg->size);
}
}
cache = cache->next;
@@ -4643,7 +4643,7 @@ static Jim_Nvp nvp_config_opts[] = {
{ .name = "-work-area-phys", .value = TCFG_WORK_AREA_PHYS },
{ .name = "-work-area-size", .value = TCFG_WORK_AREA_SIZE },
{ .name = "-work-area-backup", .value = TCFG_WORK_AREA_BACKUP },
{ .name = "-endian" , .value = TCFG_ENDIAN },
{ .name = "-endian", .value = TCFG_ENDIAN },
{ .name = "-coreid", .value = TCFG_COREID },
{ .name = "-chain-position", .value = TCFG_CHAIN_POSITION },
{ .name = "-dbgbase", .value = TCFG_DBGBASE },


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