git-svn-id: svn://svn.berlios.de/openocd/trunk@2049 b42882b7-edfa-0310-969c-e2dbd0fdcd60tags/v0.2.0
@@ -539,7 +539,7 @@ static int str9xpec_lock_device(struct flash_bank_s *bank) | |||||
field.out_value = NULL; | field.out_value = NULL; | ||||
field.in_value = &status; | field.in_value = &status; | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
} while(!(status & ISC_STATUS_BUSY)); | } while(!(status & ISC_STATUS_BUSY)); | ||||
@@ -620,7 +620,7 @@ static int str9xpec_set_address(struct flash_bank_s *bank, u8 sector) | |||||
field.out_value = §or; | field.out_value = §or; | ||||
field.in_value = NULL; | field.in_value = NULL; | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -717,7 +717,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 | |||||
field.out_value = NULL; | field.out_value = NULL; | ||||
field.in_value = scanbuf; | field.in_value = scanbuf; | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
status = buf_get_u32(scanbuf, 0, 8); | status = buf_get_u32(scanbuf, 0, 8); | ||||
@@ -767,7 +767,7 @@ static int str9xpec_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 | |||||
field.out_value = NULL; | field.out_value = NULL; | ||||
field.in_value = scanbuf; | field.in_value = scanbuf; | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
status = buf_get_u32(scanbuf, 0, 8); | status = buf_get_u32(scanbuf, 0, 8); | ||||
@@ -959,7 +959,7 @@ static int str9xpec_write_options(struct flash_bank_s *bank) | |||||
field.out_value = NULL; | field.out_value = NULL; | ||||
field.in_value = &status; | field.in_value = &status; | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
} while(!(status & ISC_STATUS_BUSY)); | } while(!(status & ISC_STATUS_BUSY)); | ||||
@@ -783,6 +783,11 @@ tap_state_t jtag_add_end_state(tap_state_t state) | |||||
return cmd_queue_end_state; | return cmd_queue_end_state; | ||||
} | } | ||||
tap_state_t jtag_get_end_state(void) | |||||
{ | |||||
return cmd_queue_end_state; | |||||
} | |||||
void jtag_add_sleep(u32 us) | void jtag_add_sleep(u32 us) | ||||
{ | { | ||||
keep_alive(); /* we might be running on a very slow JTAG clk */ | keep_alive(); /* we might be running on a very slow JTAG clk */ | ||||
@@ -2226,7 +2231,7 @@ static int handle_runtest_command(struct command_context_s *cmd_ctx, char *cmd, | |||||
return ERROR_COMMAND_SYNTAX_ERROR; | return ERROR_COMMAND_SYNTAX_ERROR; | ||||
} | } | ||||
jtag_add_runtest(strtol(args[0], NULL, 0), jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(strtol(args[0], NULL, 0), jtag_get_end_state()); | |||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -488,7 +488,7 @@ extern void jtag_add_reset(int req_tlr_or_trst, int srst); | |||||
/** | /** | ||||
* Function jtag_add_stable_clocks | |||||
* Function jtag_add_end_state | |||||
* | * | ||||
* Set a global variable to \a state if \a state != TAP_INVALID. | * Set a global variable to \a state if \a state != TAP_INVALID. | ||||
* | * | ||||
@@ -496,6 +496,13 @@ extern void jtag_add_reset(int req_tlr_or_trst, int srst); | |||||
* | * | ||||
**/ | **/ | ||||
extern tap_state_t jtag_add_end_state(tap_state_t state); | extern tap_state_t jtag_add_end_state(tap_state_t state); | ||||
/** | |||||
* Function jtag_get_end_state | |||||
* | |||||
* Return the value of the global variable for end state | |||||
* | |||||
**/ | |||||
extern tap_state_t jtag_get_end_state(void); | |||||
extern void jtag_add_sleep(u32 us); | extern void jtag_add_sleep(u32 us); | ||||
@@ -748,7 +748,7 @@ int interface_jtag_add_pathmove(int num_states, const tap_state_t *path) | |||||
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count) | void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count) | ||||
{ | { | ||||
// static int const reg_addr=0x5; | // static int const reg_addr=0x5; | ||||
tap_state_t end_state=jtag_add_end_state(TAP_INVALID); | |||||
tap_state_t end_state=jtag_get_end_state(); | |||||
if (jtag_NextEnabledTap(jtag_NextEnabledTap(NULL))==NULL) | if (jtag_NextEnabledTap(jtag_NextEnabledTap(NULL))==NULL) | ||||
{ | { | ||||
/* better performance via code duplication */ | /* better performance via code duplication */ | ||||
@@ -47,7 +47,7 @@ | |||||
23 * ARM11_REGCACHE_MODEREGS + \ | 23 * ARM11_REGCACHE_MODEREGS + \ | ||||
9 * ARM11_REGCACHE_FREGS) | 9 * ARM11_REGCACHE_FREGS) | ||||
#define ARM11_TAP_DEFAULT jtag_add_end_state(TAP_INVALID) | |||||
#define ARM11_TAP_DEFAULT jtag_get_end_state() | |||||
#define CHECK_RETVAL(action) \ | #define CHECK_RETVAL(action) \ | ||||
@@ -119,15 +119,15 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c | |||||
if (in) | if (in) | ||||
{ | { | ||||
fields[1].in_value = (u8 *)in; | fields[1].in_value = (u8 *)in; | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm7flip32, (u8 *)in); | jtag_add_callback(arm7flip32, (u8 *)in); | ||||
} else | } else | ||||
{ | { | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
} | } | ||||
if (clock) | if (clock) | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
if((retval = jtag_execute_queue()) != ERROR_OK) | if((retval = jtag_execute_queue()) != ERROR_OK) | ||||
@@ -147,9 +147,9 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int | |||||
2, | 2, | ||||
arm7tdmi_num_bits, | arm7tdmi_num_bits, | ||||
values, | values, | ||||
jtag_add_end_state(TAP_INVALID)); | |||||
jtag_get_end_state()); | |||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -187,11 +187,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) | |||||
fields[1].out_value = NULL; | fields[1].out_value = NULL; | ||||
fields[1].in_value = (u8 *)in; | fields[1].in_value = (u8 *)in; | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm7flip32, (u8 *)in); | jtag_add_callback(arm7flip32, (u8 *)in); | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
{ | { | ||||
@@ -277,11 +277,11 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, | |||||
fields[1].out_value = NULL; | fields[1].out_value = NULL; | ||||
jtag_alloc_in_value32(&fields[1]); | jtag_alloc_in_value32(&fields[1]); | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value); | jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value); | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
{ | { | ||||
@@ -127,11 +127,11 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value) | |||||
fields[3].out_value = &nr_w_buf; | fields[3].out_value = &nr_w_buf; | ||||
fields[3].in_value = NULL; | fields[3].in_value = NULL; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
fields[1].in_value = (u8 *)value; | fields[1].in_value = (u8 *)value; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | ||||
@@ -180,7 +180,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value) | |||||
fields[3].out_value = &nr_w_buf; | fields[3].out_value = &nr_w_buf; | ||||
fields[3].in_value = NULL; | fields[3].in_value = NULL; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); | LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); | ||||
@@ -227,7 +227,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode) | |||||
fields[3].out_value = &nr_w_buf; | fields[3].out_value = &nr_w_buf; | ||||
fields[3].in_value = NULL; | fields[3].in_value = NULL; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0); | arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0); | ||||
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1); | ||||
@@ -157,7 +157,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 | |||||
fields[3].out_value = &nr_w_buf; | fields[3].out_value = &nr_w_buf; | ||||
fields[3].in_value = NULL; | fields[3].in_value = NULL; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
/*TODO: add timeout*/ | /*TODO: add timeout*/ | ||||
do | do | ||||
@@ -165,7 +165,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3 | |||||
/* rescan with NOP, to wait for the access to complete */ | /* rescan with NOP, to wait for the access to complete */ | ||||
access = 0; | access = 0; | ||||
nr_w_buf = 0; | nr_w_buf = 0; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | ||||
@@ -227,14 +227,14 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u | |||||
fields[3].out_value = &nr_w_buf; | fields[3].out_value = &nr_w_buf; | ||||
fields[3].in_value = NULL; | fields[3].in_value = NULL; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
/*TODO: add timeout*/ | /*TODO: add timeout*/ | ||||
do | do | ||||
{ | { | ||||
/* rescan with NOP, to wait for the access to complete */ | /* rescan with NOP, to wait for the access to complete */ | ||||
access = 0; | access = 0; | ||||
nr_w_buf = 0; | nr_w_buf = 0; | ||||
jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(4, fields, jtag_get_end_state()); | |||||
if ((retval = jtag_execute_queue()) != ERROR_OK) | if ((retval = jtag_execute_queue()) != ERROR_OK) | ||||
{ | { | ||||
return retval; | return retval; | ||||
@@ -189,11 +189,11 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value) | |||||
fields[2].out_value = &nr_w_buf; | fields[2].out_value = &nr_w_buf; | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
fields[1].in_value = (u8 *)value; | fields[1].in_value = (u8 *)value; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | jtag_add_callback(arm_le_to_h_u32, (u8 *)value); | ||||
@@ -244,7 +244,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value) | |||||
fields[2].out_value = &nr_w_buf; | fields[2].out_value = &nr_w_buf; | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); | LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value); | ||||
@@ -204,16 +204,16 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s | |||||
if (in) | if (in) | ||||
{ | { | ||||
fields[0].in_value=(u8 *)in; | fields[0].in_value=(u8 *)in; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)in); | jtag_add_callback(arm_le_to_h_u32, (u8 *)in); | ||||
} | } | ||||
else | else | ||||
{ | { | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
} | } | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
{ | { | ||||
@@ -263,11 +263,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in) | |||||
fields[2].out_value = NULL; | fields[2].out_value = NULL; | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)in); | jtag_add_callback(arm_le_to_h_u32, (u8 *)in); | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
{ | { | ||||
@@ -330,11 +330,11 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, | |||||
fields[2].out_value = NULL; | fields[2].out_value = NULL; | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value); | jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value); | ||||
jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_runtest(0, jtag_get_end_state()); | |||||
#ifdef _DEBUG_INSTRUCTION_EXECUTION_ | #ifdef _DEBUG_INSTRUCTION_EXECUTION_ | ||||
{ | { | ||||
@@ -83,7 +83,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o | |||||
fields[1].out_value = outvalue; | fields[1].out_value = outvalue; | ||||
fields[1].in_value = invalue; | fields[1].in_value = invalue; | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -118,13 +118,13 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u | |||||
if (invalue) | if (invalue) | ||||
{ | { | ||||
fields[1].in_value = (u8 *)invalue; | fields[1].in_value = (u8 *)invalue; | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue); | jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue); | ||||
} else | } else | ||||
{ | { | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -53,13 +53,13 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, void *no_verify_ca | |||||
if (no_verify_capture==NULL) | if (no_verify_capture==NULL) | ||||
{ | { | ||||
jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_ir_scan(1, &field, jtag_get_end_state()); | |||||
} else | } else | ||||
{ | { | ||||
/* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to | /* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to | ||||
* have special verification code. | * have special verification code. | ||||
*/ | */ | ||||
jtag_add_ir_scan_noverify(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_ir_scan_noverify(1, &field, jtag_get_end_state()); | |||||
} | } | ||||
} | } | ||||
@@ -86,7 +86,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain) | |||||
1, | 1, | ||||
num_bits, | num_bits, | ||||
values, | values, | ||||
jtag_add_end_state(TAP_INVALID)); | |||||
jtag_get_end_state()); | |||||
jtag_info->cur_scan_chain = new_scan_chain; | jtag_info->cur_scan_chain = new_scan_chain; | ||||
} | } | ||||
@@ -266,7 +266,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) | |||||
fields[2].check_value = NULL; | fields[2].check_value = NULL; | ||||
fields[2].check_mask = NULL; | fields[2].check_mask = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
fields[0].in_value = reg->value; | fields[0].in_value = reg->value; | ||||
fields[0].check_value = check_value; | fields[0].check_value = check_value; | ||||
@@ -278,7 +278,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) | |||||
*/ | */ | ||||
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); | buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); | ||||
jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan_check(3, fields, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -314,7 +314,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) | |||||
buf_set_u32(fields[2].out_value, 0, 1, 0); | buf_set_u32(fields[2].out_value, 0, 1, 0); | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
while (size > 0) | while (size > 0) | ||||
{ | { | ||||
@@ -325,7 +325,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size) | |||||
buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); | buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]); | ||||
fields[0].in_value = (u8 *)data; | fields[0].in_value = (u8 *)data; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback(arm_le_to_h_u32, (u8 *)data); | jtag_add_callback(arm_le_to_h_u32, (u8 *)data); | ||||
data++; | data++; | ||||
@@ -420,7 +420,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size) | |||||
while (size > 0) | while (size > 0) | ||||
{ | { | ||||
buf_set_u32(fields[0].out_value, 0, 32, *data); | buf_set_u32(fields[0].out_value, 0, 32, *data); | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
data++; | data++; | ||||
size--; | size--; | ||||
@@ -471,11 +471,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout) | |||||
buf_set_u32(fields[2].out_value, 0, 1, 0); | buf_set_u32(fields[2].out_value, 0, 1, 0); | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
gettimeofday(&lap, NULL); | gettimeofday(&lap, NULL); | ||||
do | do | ||||
{ | { | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
if ((retval = jtag_execute_queue()) != ERROR_OK) | if ((retval = jtag_execute_queue()) != ERROR_OK) | ||||
return retval; | return retval; | ||||
@@ -121,7 +121,7 @@ static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_add | |||||
3, | 3, | ||||
embeddedice_num_bits, | embeddedice_num_bits, | ||||
values, | values, | ||||
jtag_add_end_state(TAP_INVALID)); | |||||
jtag_get_end_state()); | |||||
} | } | ||||
void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count); | void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count); | ||||
@@ -63,7 +63,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr) | |||||
field.in_value = NULL; | field.in_value = NULL; | ||||
jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_ir_scan(1, &field, jtag_get_end_state()); | |||||
free(field.out_value); | free(field.out_value); | ||||
} | } | ||||
@@ -86,7 +86,7 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain) | |||||
/* select INTEST instruction */ | /* select INTEST instruction */ | ||||
etb_set_instr(etb, 0x2); | etb_set_instr(etb, 0x2); | ||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
etb->cur_scan_chain = new_scan_chain; | etb->cur_scan_chain = new_scan_chain; | ||||
@@ -190,7 +190,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) | |||||
buf_set_u32(fields[2].out_value, 0, 1, 0); | buf_set_u32(fields[2].out_value, 0, 1, 0); | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
for (i = 0; i < num_frames; i++) | for (i = 0; i < num_frames; i++) | ||||
{ | { | ||||
@@ -204,7 +204,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames) | |||||
buf_set_u32(fields[1].out_value, 0, 7, 0); | buf_set_u32(fields[1].out_value, 0, 7, 0); | ||||
fields[0].in_value = (u8 *)(data+i); | fields[0].in_value = (u8 *)(data+i); | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_add_callback(etb_getbuf, (u8 *)(data+i)); | jtag_add_callback(etb_getbuf, (u8 *)(data+i)); | ||||
} | } | ||||
@@ -252,7 +252,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) | |||||
fields[2].check_value = NULL; | fields[2].check_value = NULL; | ||||
fields[2].check_mask = NULL; | fields[2].check_mask = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
/* read the identification register in the second run, to make sure we | /* read the identification register in the second run, to make sure we | ||||
* don't read the ETB data register twice, skipping every second entry | * don't read the ETB data register twice, skipping every second entry | ||||
@@ -262,7 +262,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) | |||||
fields[0].check_value = check_value; | fields[0].check_value = check_value; | ||||
fields[0].check_mask = check_mask; | fields[0].check_mask = check_mask; | ||||
jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan_check(3, fields, jtag_get_end_state()); | |||||
free(fields[1].out_value); | free(fields[1].out_value); | ||||
free(fields[2].out_value); | free(fields[2].out_value); | ||||
@@ -347,13 +347,13 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask) | |||||
fields[2].check_value = NULL; | fields[2].check_value = NULL; | ||||
fields[2].check_mask = NULL; | fields[2].check_mask = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
fields[0].in_value = reg->value; | fields[0].in_value = reg->value; | ||||
fields[0].check_value = check_value; | fields[0].check_value = check_value; | ||||
fields[0].check_mask = check_mask; | fields[0].check_mask = check_mask; | ||||
jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan_check(3, fields, jtag_get_end_state()); | |||||
free(fields[1].out_value); | free(fields[1].out_value); | ||||
free(fields[2].out_value); | free(fields[2].out_value); | ||||
@@ -430,7 +430,7 @@ int etm_write_reg(reg_t *reg, u32 value) | |||||
buf_set_u32(fields[2].out_value, 0, 1, 1); | buf_set_u32(fields[2].out_value, 0, 1, 1); | ||||
fields[2].in_value = NULL; | fields[2].in_value = NULL; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -159,9 +159,9 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr) | |||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
/* no jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)) here */ | |||||
/* no jtag_add_runtest(0, jtag_get_end_state()) here */ | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||
@@ -50,7 +50,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m | |||||
jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_ir_scan(1, &field, jtag_get_end_state()); | |||||
} | } | ||||
return ERROR_OK; | return ERROR_OK; | ||||
@@ -73,7 +73,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode) | |||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
if (jtag_execute_queue() != ERROR_OK) | if (jtag_execute_queue() != ERROR_OK) | ||||
{ | { | ||||
@@ -100,7 +100,7 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode) | |||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
if (jtag_execute_queue() != ERROR_OK) | if (jtag_execute_queue() != ERROR_OK) | ||||
{ | { | ||||
@@ -131,7 +131,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data) | |||||
jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(1, &field, jtag_get_end_state()); | |||||
if ((retval = jtag_execute_queue()) != ERROR_OK) | if ((retval = jtag_execute_queue()) != ERROR_OK) | ||||
{ | { | ||||
@@ -212,7 +212,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr) | |||||
u8 tmp[4]; | u8 tmp[4]; | ||||
field.in_value = tmp; | field.in_value = tmp; | ||||
jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_ir_scan(1, &field, jtag_get_end_state()); | |||||
/* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */ | /* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */ | ||||
jtag_check_value_mask(&field, tap->expected, tap->expected_mask); | jtag_check_value_mask(&field, tap->expected, tap->expected_mask); | ||||
@@ -262,7 +262,7 @@ int xscale_read_dcsr(target_t *target) | |||||
u8 tmp2; | u8 tmp2; | ||||
fields[2].in_value = &tmp2; | fields[2].in_value = &tmp2; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); | jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); | ||||
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); | jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); | ||||
@@ -285,7 +285,7 @@ int xscale_read_dcsr(target_t *target) | |||||
jtag_add_end_state(TAP_IDLE); | jtag_add_end_state(TAP_IDLE); | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
/* DANGER!!! this must be here. It will make sure that the arguments | /* DANGER!!! this must be here. It will make sure that the arguments | ||||
* to jtag_set_check_value() does not go out of scope! */ | * to jtag_set_check_value() does not go out of scope! */ | ||||
@@ -347,7 +347,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words) | |||||
jtag_add_end_state(TAP_IDLE); | jtag_add_end_state(TAP_IDLE); | ||||
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx); | xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx); | ||||
jtag_add_runtest(1, jtag_add_end_state(TAP_INVALID)); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */ | |||||
jtag_add_runtest(1, jtag_get_end_state()); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */ | |||||
/* repeat until all words have been collected */ | /* repeat until all words have been collected */ | ||||
int attempts=0; | int attempts=0; | ||||
@@ -725,7 +725,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk) | |||||
u8 tmp2; | u8 tmp2; | ||||
fields[2].in_value = &tmp2; | fields[2].in_value = &tmp2; | ||||
jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(3, fields, jtag_get_end_state()); | |||||
jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); | jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask); | ||||
jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); | jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask); | ||||
@@ -800,7 +800,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) | |||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
fields[0].num_bits = 32; | fields[0].num_bits = 32; | ||||
fields[0].out_value = packet; | fields[0].out_value = packet; | ||||
@@ -816,7 +816,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8]) | |||||
memcpy(&value, packet, sizeof(u32)); | memcpy(&value, packet, sizeof(u32)); | ||||
cmd = parity(value); | cmd = parity(value); | ||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
} | } | ||||
jtag_execute_queue(); | jtag_execute_queue(); | ||||
@@ -862,7 +862,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va) | |||||
jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID)); | |||||
jtag_add_dr_scan(2, fields, jtag_get_end_state()); | |||||
return ERROR_OK; | return ERROR_OK; | ||||
} | } | ||||