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armv7m: use ARM_MODE_THREAD core mode for algoorithm's

This makes sure we are using privileged mode when executing any loaders.

Change-Id: I18bf32ec92e1c76a66ab25e3712652bc3650b332
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1108
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
tags/v0.7.0-rc1
Spencer Oliver 11 years ago
committed by Andreas Fritiofson
parent
commit
feddedb6db
11 changed files with 14 additions and 14 deletions
  1. +1
    -1
      src/flash/nor/cfi.c
  2. +1
    -1
      src/flash/nor/efm32.c
  3. +1
    -1
      src/flash/nor/em357.c
  4. +1
    -1
      src/flash/nor/fm3.c
  5. +1
    -1
      src/flash/nor/lpc2000.c
  6. +3
    -3
      src/flash/nor/lpcspifi.c
  7. +1
    -1
      src/flash/nor/stellaris.c
  8. +1
    -1
      src/flash/nor/stm32f1x.c
  9. +1
    -1
      src/flash/nor/stm32f2x.c
  10. +1
    -1
      src/flash/nor/stm32lx.c
  11. +2
    -2
      src/target/armv7m.c

+ 1
- 1
src/flash/nor/cfi.c View File

@@ -1778,7 +1778,7 @@ static int cfi_spansion_write_block(struct flash_bank *bank, uint8_t *buffer,

if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_algo.core_mode = ARM_MODE_ANY;
armv7m_algo.core_mode = ARM_MODE_THREAD;
arm_algo = &armv7m_algo;
} else if (is_arm(target_to_arm(target))) {
/* All other ARM CPUs have 32 bit instructions */


+ 1
- 1
src/flash/nor/efm32.c View File

@@ -610,7 +610,7 @@ static int efm32x_write_block(struct flash_bank *bank, uint8_t *buf,
buf_set_u32(reg_params[4].value, 0, 32, address);

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

ret = target_run_flash_async_algorithm(target, buf, count, 4,
0, NULL,


+ 1
- 1
src/flash/nor/em357.c View File

@@ -522,7 +522,7 @@ static int em357_write_block(struct flash_bank *bank, uint8_t *buffer,
;

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);


+ 1
- 1
src/flash/nor/fm3.c View File

@@ -502,7 +502,7 @@ static int fm3_write_block(struct flash_bank *bank, uint8_t *buffer,
}

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* source start address */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* target start address */


+ 1
- 1
src/flash/nor/lpc2000.c View File

@@ -309,7 +309,7 @@ static int lpc2000_iap_call(struct flash_bank *bank, struct working_area *iap_wo
switch (lpc2000_info->variant) {
case lpc1700:
armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;
iap_entry_point = 0x1fff1ff1;
break;
case lpc2000_v1:


+ 3
- 3
src/flash/nor/lpcspifi.c View File

@@ -182,7 +182,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
};

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;


LOG_DEBUG("Allocating working area for SPIFI init algorithm");
@@ -519,7 +519,7 @@ static int lpcspifi_erase(struct flash_bank *bank, int first, int last)
};

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;


/* Get memory for spifi initialization algorithm */
@@ -726,7 +726,7 @@ static int lpcspifi_write(struct flash_bank *bank, uint8_t *buffer,
};

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* buffer end */


+ 1
- 1
src/flash/nor/stellaris.c View File

@@ -1045,7 +1045,7 @@ static int stellaris_write_block(struct flash_bank *bank,
(uint8_t *) stellaris_write_code);

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);


+ 1
- 1
src/flash/nor/stm32f1x.c View File

@@ -656,7 +656,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
buf_set_u32(reg_params[4].value, 0, 32, address);

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

retval = target_run_flash_async_algorithm(target, buffer, count, 2,
0, NULL,


+ 1
- 1
src/flash/nor/stm32f2x.c View File

@@ -558,7 +558,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer,
};

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT); /* buffer start, status (out) */
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* buffer end */


+ 1
- 1
src/flash/nor/stm32lx.c View File

@@ -283,7 +283,7 @@ static int stm32lx_write_half_pages(struct flash_bank *bank, uint8_t *buffer,
}

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;
init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);


+ 2
- 2
src/target/armv7m.c View File

@@ -661,7 +661,7 @@ int armv7m_checksum_memory(struct target *target,
goto cleanup;

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_IN_OUT);
init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
@@ -721,7 +721,7 @@ int armv7m_blank_check_memory(struct target *target,
return retval;

armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
armv7m_info.core_mode = ARM_MODE_ANY;
armv7m_info.core_mode = ARM_MODE_THREAD;

init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
buf_set_u32(reg_params[0].value, 0, 32, address);


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