The Flash driver for at91sam4 cpu's has been enhanced to recognise and support the SAM4N family.
Change-Id: I50c471a6053b52edffd8efdd8abfe516cc5c55ee
Signed-off-by: Colin Helliwell <colin.helliwell@ln-systems.com>
Reviewed-on: http://openocd.zylin.com/3242
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added the chip definition for the Atmel AT91SAM4S4A. This chip is a 48-pin
package with 256k flash and 64k ram.
Change-Id: I8ada7d5735e31e0ce086f96f5906c7358464245c
Signed-off-by: Thomas Schmid <thomas@rfranging.com>
Reviewed-on: http://openocd.zylin.com/2254
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51). The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.
Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19. Tested on this board and chip combination.
Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This eliminates most of the warnings reported when building for
arm-none-eabi (newlib).
Hsiangkai, there're many similar warnings left in your nds32 files, I
didn't have the nerve to clean them all, probably you could pick it
up.
Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code didn't address the case where diva is bigger than 1.
Change-Id: I15d8c47aa7b5cf80df1f29e067f30575f5d60a90
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1765
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove the static const array containing ARM instructions for a
bootstrap program. Despite what the comment says, the DAP can write to
the Flash and in fact this program is not referenced anywhere in openocd
so it's a bit confusing having it in there. There should be no
functionality change from this.
Change-Id: I4ca4206f090a896628ee9b675d1f04450ada1563
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1641
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Remove lots of no-op or dummy info function implementations and check if
it's implemented before invoking it.
Change-Id: I2144dad6a84a80359bb13a8a29a4614387e4c135
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1642
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In FLASHD_ErasePages AT91C_EFC_FCMD_EPA is used to erase sectors.
According to the datasheet FARG[15:2] defines the page from which
the erase will start.This page must be modulo 4, 8, 16 or 32
according to the number of pages to erase. FARG[1:0] defines the
number of pages to be erased. Previously (firstpage << 2) was used
to conform to this, seems it should not be shifted... Changed it
to (firstPage) | erasePages.
Change-Id: I791cc7fc4faf056623ad5a6c7e860315306098a1
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/830
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
In the previous iteration, the page counter for erases would not be updated with
the erase size. This patch keeps the page counter synced with the sector counter.
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Change-Id: I95e56a3257b2ad8301c9f28167b842fa6466334f
Reviewed-on: http://openocd.zylin.com/686
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26
SAM4S16C - 1024KB flash LQFP100/BGA100
SAM4S16B - 1024KB flash LQFP64/QFN64
SAM4S16A - 1024KB flash LQFP48/QFN48
SAM4S8C - 512KB flash LQFP100/BGA100
SAM4S8B - 512KB flash LQFP64/QFN64
SAM4S8A - 512KB flash LQFP48/QFN48
The SAM4S processors still suffer from the "6 waitstates needed
to program device" errata.
Other relevant changes are:
1. Address of flash memory starts at 0x400000.
2. EWP (Erase page and write page) only works for the first two 8KB "sectors"
3. Because of the EWP not working for all the sectors, normal page writes have
to be used. The default_flash_blank_check is used to check if lockregions
should be erased.
4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was
500 ms)
5. There are 128 lockable regions of 8KB each.
Implemented default blank checking, and page erase for load_image scenarios.
This is to compensate for the EWP flash commands only working on the
first 2 8KB sectors.
Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/528
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Atmel introduced 7 new Cortex-M3 processors on 2012-02-28
SAM3X4C - 256KB flash
SAM3X4E - 256KB flash
SAM3X8C - 512KB flash
SAM3X8E - 512KB flash
SAM3X8H (Only on dev-kit - not in production...) - 512KB flash
SAM3A4C - 256KB flash
SAM3A8C - 256KB flash
The SAM3X/A processors still suffer from the "6 waitstates needed
to program device" errata.
The CIDR address for the SAM3X/A processors are different from the
other SAM3 processors. Unfortunately, the chip identification register
is not at a constant address across all of the SAM3 series'. As a
consequence, a simple heuristic is used to find where it's
at... If the contents at the first address is zero, then we know
that the second address is where the chip id register is.
We can deduce this because for those SAM's that have the chip id @ 0x400e0940,
the first address, 0x400e0740, is located in the memory map of the Power
Management Controller (PMC). Furthermore, the address is not used by the PMC.
So when read, the memory controller returns zero.
Another interesting change is the flash bank address for flash bank 1.
It is not fixed at 0x00100000 like the Sam3U. Bank 1 of the at91sam3a/x
series starts at 0x00080000 + half the total flash size. Thus for the 256KB
devices Bank 1 is located at 0x000A0000, and for the 512KB devices Bank 1 is
located at 0x000C0000.
The configuration files for the SAM3X/A processors will follow
Change-Id: I6c3a707c00e05d993a2ad1d5a423f23b37ffd553
Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com>
Reviewed-on: http://openocd.zylin.com/505
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The SUPC (Supply Controller) registers are on different base addresses on different
SAM3 chips:
SAM3U: 0x400e1210
SAM3N: 0x400e1410
SAM3S: 0x400e1410
This creates a problem with the sam3_reg_list array which is const, but would need
to be changed at runtime to account for this variability. As this register is not
used anywhere, it's simplest to just remove it.
Change-Id: I987eb371648d826aa6d5e9de18d38c7bb66d6fca
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Lock region count and sector sizes did not match datasheet.
(see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1)
Change-Id: Ic511802f96ed03856467a24a6736349205a0576a
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/493
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The assert introduced in 00c8648351 checks
whether the programming offset equals to page_size of the flash, while it
wants to check whether the offset is a multiple of the page_size.
Change-Id: I794d021951a28c1cc520b5eea5d500f097721b06
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/482
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
On wrong parameters a error is signalized to the calling function.
Change-Id: I484443fdb39938e20382edc9246d5ec546a5c960
Signed-off-by: Mathias K <kesmtp@freenet.de>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Reviewed-on: http://openocd.zylin.com/282
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
* Add flash waitstate support for Atmel SAM3 chips.
* Set default waitstates to 6, to workaround a silicon bug in the SAM3 family
This code has been tested on SAM3U4, SAM3N4 and SAM3N1
based on Change-Id: I477446f9bfb3e910ea3e2414a6e9a75beb14a214
by Jim Norris <u17263@att.net>
Change-Id: I8d360080f6968979ca5e197ad638282cadd18fb7
Signed-off-by: Attila Kinali <attila@kinali.ch>
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/128
Tested-by: jenkins
production processor versions increment, thus the version
bits should be ignored for future proofing. e.g.
Engineering sample version == 0x00, production version 0x01
Fix a bunch of typos.
Most are in code comments, so nothing should break. UNKOWN_COMMAND and
CMD_UNKOWN are not used elsewhere, so correcting the spelling should
also not break anything.
Remove extra \n from LOG_DEBUG, LOG_INFO, and LOG_WARNING messages
Remove LOG_INFO_N
LOG_INFO_N was only used once and had a \n at the end
Change LOG_USER_N calls that end with \n to LOG_USER
Helper ./src/helper/membuf.c is only used in at91sam3.c
1) Replace membuf with LOG_*
2) The original code in sam3_GetDetails() invalidates
all the buffered output of sam3_GetInfo(). The new
code skips sam3_GetInfo() if its output should not
be printed.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Final target is to force bus_width size during CFI flash
read.
In this first step I need to replace default flash read
with flash specific implementation.
This patch introduces:
- flash_driver_read() layer;
- default_flash_read(), backward compatible;
- read() callback in struct flash_driver;
- proper initialization in every flash_driver instance.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
- armv7m_run_algorithm now requires all algorithms to use
a software breakpoint at their exit address
- updated all algorithms to support this
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Make "usage" messages use the same EBNF as the User's Guide;
no angle brackets. Improve and correct various helptexts.
Don't use "&function"; a function's name is its address.
Remove a couple instances of pointless whitespace; shrink a
few overlong lines; fix some bad indents.
Add TODO list entry re full support for NAND/NOR bank names.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Changes from the flat namespace to heirarchical one. Instead of writing:
#include "flash.h"
the following form should be used.
#include <flash/flash.h>
The exception is from .c files in the same directory.
Colin Helliwell
Evan Hunter
Patrick Noffke
Jörg Wunsch
Thomas Schmid
Marco Cruz
Andreas Fritiofson
Andrey Yurovsky
Paul Fertser
Thomas Schmid
Spencer Oliver
Peter Dietzsch
Olivier Schonken
Attila Kinali
Mathias K
Øyvind Harboe
Uwe Hermann
Eric Wetzel
Antonio Borneo
Olaf Lüke
Spencer Oliver
David Brownell
Zachary T Welch