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  1. # Configuration for the ST SPEAr310 Evaluation board
  2. # EVALSPEAr310 Rev. 2.0, modified to enable SRST on JTAG connector
  3. # http://www.st.com/spear
  4. #
  5. # List of board modifications to enable SRST, as reported in
  6. # ST Application Note AN3321.
  7. # - Modifications on the top layer:
  8. # 1. remove R137 and C57, located near the SMII PHY U18;
  9. # 2. remove R172 and C75, located near the SMII PHY U19;
  10. # 3. remove R207 and C90, located near the SMII PHY U20;
  11. # 4. remove C236, located near the SMII PHY U21;
  12. # 5. remove U12, located near the JTAG connector;
  13. # 6. solder together pins 7, 8 and 9 of U12;
  14. # 7. solder together pins 11, 12, 13, 14, 15, 16, 17 and 18 of U12.
  15. # - Modifications on the bottom layer:
  16. # 8. replace reset chip U11 with a STM6315SDW13F;
  17. # 9. add 0 ohm resistor R329. It is located close to JTAG connector.
  18. #
  19. # Date: 2009-10-31
  20. # Author: Antonio Borneo <borneo.antonio@gmail.com>
  21. # Modified boards has SRST on JTAG connector
  22. set BOARD_HAS_SRST 1
  23. source [find board/spear310evb20.cfg]