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  1. # script for ATMEL sam4l, a Cortex-M4 chip
  2. #
  3. source [find target/at91sam4XXX.cfg]
  4. set _FLASHNAME $_CHIPNAME.flash
  5. flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME
  6. # SAM4L SMAP will hold the CPU in reset if TCK is low when RESET_N
  7. # deasserts (see datasheet 42023E-SAM-07/2013 sec 8.11.3).
  8. #
  9. # smap_reset_deassert configures whether we want to run or halt out of reset,
  10. # then instruct the SMAP to let us out of reset.
  11. $_TARGETNAME configure -event reset-deassert-post "at91sam4l smap_reset_deassert"
  12. # SRST (wired to RESET_N) resets debug circuitry
  13. # srst_pulls_trst is not configured here to avoid an error raised in reset halt
  14. reset_config srst_gates_jtag
  15. # SAM4L starts from POR with SYSCLK set to 115kHz RCSYS, needs slow JTAG speed.
  16. # Datasheet does not specify SYSCLK to JTAG/SWD clock ratio.
  17. # Usually used SYSCLK/6 is hell slow, testing shows that debugging can work @ SYSCLK/2
  18. # but your mileage may vary.
  19. adapter speed 50
  20. # System RC oscillator RCSYS starts in 3 cycles
  21. adapter srst delay 0