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  1. # Texas Instruments OMAP 2420
  2. # http://www.ti.com/omap
  3. # as seen in Nokia N8x0 tablets
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME omap2420
  8. }
  9. # NOTE: likes slowish clock on reset (1.5 MBit/s or less) or use RCLK
  10. reset_config srst_nogate
  11. # Subsidiary TAP: ARM7TDMIr4 plus imaging ... must add via ICEpick (addr 6).
  12. jtag newtap $_CHIPNAME iva -irlen 4 -disable
  13. # Subsidiary TAP: C55x DSP ... must add via ICEpick (addr 2).
  14. jtag newtap $_CHIPNAME dsp -irlen 38 -disable
  15. # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
  16. if { [info exists ETB_TAPID] } {
  17. set _ETB_TAPID $ETB_TAPID
  18. } else {
  19. set _ETB_TAPID 0x2b900f0f
  20. }
  21. jtag newtap $_CHIPNAME etb -irlen 4 -expected-id $_ETB_TAPID
  22. # Subsidiary TAP: ARM1136jf-s with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
  23. if { [info exists CPU_TAPID] } {
  24. set _CPU_TAPID $CPU_TAPID
  25. } else {
  26. set _CPU_TAPID 0x07b3602f
  27. }
  28. jtag newtap $_CHIPNAME arm -irlen 5 -expected-id $_CPU_TAPID
  29. # Primary TAP: ICEpick-B (JTAG route controller) and boundary scan
  30. if { [info exists JRC_TAPID] } {
  31. set _JRC_TAPID $JRC_TAPID
  32. } else {
  33. set _JRC_TAPID 0x01ce4801
  34. }
  35. jtag newtap $_CHIPNAME jrc -irlen 2 -expected-id $_JRC_TAPID
  36. # GDB target: the ARM.
  37. set _TARGETNAME $_CHIPNAME.arm
  38. target create $_TARGETNAME arm11 -chain-position $_TARGETNAME
  39. # scratch: framebuffer, may be initially unavailable in some chips
  40. $_TARGETNAME configure -work-area-phys 0x40210000
  41. $_TARGETNAME configure -work-area-size 0x00081000
  42. $_TARGETNAME configure -work-area-backup 0
  43. # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
  44. etm config $_TARGETNAME 16 normal full etb
  45. etb config $_TARGETNAME $_CHIPNAME.etb
  46. # RM_RSTCTRL_WKUP.RST.GS - Trigger a global software reset, and
  47. # give it a chance to finish before we talk to the chip again.
  48. set RM_RSTCTRL_WKUP 0x48008450
  49. $_TARGETNAME configure -event reset-assert \
  50. "halt; $_TARGETNAME mww $RM_RSTCTRL_WKUP 2; sleep 200"