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  1. #
  2. # Texas Instruments DaVinci family: OMAPL138
  3. #
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME omapl138
  8. }
  9. source [find target/icepick.cfg]
  10. # Subsidiary TAP: ARM ETB11, with scan chain for 4K of ETM trace buffer
  11. if { [info exists ETB_TAPID] } {
  12. set _ETB_TAPID $ETB_TAPID
  13. } else {
  14. set _ETB_TAPID 0x2b900f0f
  15. }
  16. jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETB_TAPID -disable
  17. jtag configure $_CHIPNAME.etb -event tap-enable \
  18. "icepick_c_tapenable $_CHIPNAME.jrc 3"
  19. # Subsidiary TAP: ARM926ejs with scan chains for ARM Debug, EmbeddedICE-RT, ETM.
  20. if { [info exists CPU_TAPID] } {
  21. set _CPU_TAPID $CPU_TAPID
  22. } else {
  23. set _CPU_TAPID 0x07926001
  24. }
  25. jtag newtap $_CHIPNAME arm -irlen 4 -irmask 0xf -expected-id $_CPU_TAPID -disable
  26. jtag configure $_CHIPNAME.arm -event tap-enable \
  27. "icepick_c_tapenable $_CHIPNAME.jrc 2"
  28. # Primary TAP: ICEpick-C (JTAG route controller) and boundary scan
  29. if { [info exists JRC_TAPID] } {
  30. set _JRC_TAPID $JRC_TAPID
  31. } else {
  32. set _JRC_TAPID 0x0b7d102f
  33. }
  34. jtag newtap $_CHIPNAME jrc -irlen 6 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
  35. jtag configure $_CHIPNAME.jrc -event setup \
  36. "jtag tapenable $_CHIPNAME.etb; jtag tapenable $_CHIPNAME.arm"
  37. ################
  38. # GDB target: the ARM, using SRAM1 for scratch. SRAM0 (also 8K)
  39. # and the ETB memory (4K) are other options, while trace is unused.
  40. # Little-endian; use the OpenOCD default.
  41. set _TARGETNAME $_CHIPNAME.arm
  42. target create $_TARGETNAME arm926ejs -chain-position $_TARGETNAME
  43. $_TARGETNAME configure -work-area-phys 0x80000000 -work-area-size 0x2000
  44. # be absolutely certain the JTAG clock will work with the worst-case
  45. # CLKIN = 20 MHz (best case: 30 MHz) even when no bootloader turns
  46. # on the PLL and starts using it. OK to speed up after clock setup.
  47. adapter speed 1500
  48. $_TARGETNAME configure -event "reset-start" { adapter speed 1500 }
  49. arm7_9 fast_memory_access enable
  50. arm7_9 dcc_downloads enable
  51. # trace setup
  52. etm config $_TARGETNAME 16 normal full etb
  53. etb config $_TARGETNAME $_CHIPNAME.etb
  54. gdb_breakpoint_override hard
  55. arm7_9 dbgrq enable