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  1. # Target configuration for the Samsung 2450 system on chip
  2. # Processor : ARM926ejs (wb) rev 0 (v4l)
  3. # Info: JTAG tap: s3c2450.cpu tap/device found: 0x07926F0F
  4. # FIX!!! what to use here?
  5. #
  6. # RCLK?
  7. #
  8. # adapter speed 0
  9. #
  10. # Really low clock during reset?
  11. #
  12. # adapter speed 1
  13. if { [info exists CHIPNAME] } {
  14. set _CHIPNAME $CHIPNAME
  15. } else {
  16. set _CHIPNAME s3c2450
  17. }
  18. if { [info exists ENDIAN] } {
  19. set _ENDIAN $ENDIAN
  20. } else {
  21. # this defaults to a bigendian
  22. set _ENDIAN little
  23. }
  24. if { [info exists CPUTAPID] } {
  25. set _CPUTAPID $CPUTAPID
  26. } else {
  27. set _CPUTAPID 0x07926f0f
  28. }
  29. #jtag scan chain
  30. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xE -irmask 0x0f -expected-id $_CPUTAPID
  31. set _TARGETNAME $_CHIPNAME.cpu
  32. target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  33. # FIX!!!!! should this really use srst_pulls_trst?
  34. # With srst_pulls_trst "reset halt" will not reset into the
  35. # halted mode, but rather "reset run" and then halt the target.
  36. #
  37. # However, without "srst_pulls_trst", then "reset halt" produces weird
  38. # errors:
  39. # WARNING: unknown debug reason: 0x0
  40. reset_config trst_and_srst