You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
 
oharboe 1231443b59 lpc2148 fixes from Edgar Grimberg 13 years ago
contrib/libdcc - contrib directory added 13 years ago
doc - updated cortex_m3 docs regarding luminary reset behaviour 13 years ago
ecosflash deleted obsolete stuff. 13 years ago
src lpc2148 fixes from Edgar Grimberg 13 years ago
testing lpc2148 fixes from Edgar Grimberg 13 years ago
AUTHORS - use correct SCAN_N check value (disabled by default) 13 years ago
BUGS - added svn props for newly added files 13 years ago
COPYING - prepare OpenOCD for branching, created ./trunk/ 15 years ago
ChangeLog retired 13 years ago
INSTALL - updated configuration examples, installation instructions and README (including list of supported JTAG interfaces) 15 years ago
Makefile.am - reset_run now works as expected on cortex-m3 14 years ago
NEWS - added svn props 13 years ago
README - Added coding style to README 13 years ago
TODO Tweaked logging output. 13 years ago
bootstrap - documentation fixes (thanks to Uwe Hermann) 14 years ago
configure.in A dummy driver to test codepath w/no contact w/target. 13 years ago
guess-rev.sh Pavel Chromy fix: the guess-rev.sh scripts to retrieve SVN revision returns the result including new line 13 years ago

README

                                    OpenOCD

Free and Open On-Chip Debugging, In-System Programming
and Boundary-Scan Testing
Copyright (c) 2004-2007 Dominic Rath

The debugger uses an IEEE 1149-1 compliant JTAG TAP bus master to access on-chip
debug functionality available on ARM7 and ARM9 based microcontrollers /
system-on-chip solutions.

User interaction is realized through a telnet command line interface and a gdb
(The GNU Debugger) remote protocol server.

1. JTAG hardware

Currently, OpenOCD supports the following JTAG interfaces:

- Parallel port wigglers. These devices connect to a PC's parallel port,
providing direct access to the JTAG lines. The OpenOCD contains descriptions
of a few Wiggler layouts, including the original 'Wiggler' design. Other
layouts (i.e. mapping of parallel port pins to JTAG lines) can be added easily.
Typical Wiggler speeds are around 12kByte/s code download to an ARM7's RAM.

The list of supported parallel port devices includes:

* Macraigor Wiggler JTAG cable
* Gateworks GW16012 JTAG programmer
* Xilinx DLC5 JTAG parallel cable III
* Ka-Ro TRITON starterkit II JTAG cable
* Lattice parallel port JTAG cable
* ST FlashLINK programming cable
* Wiggler 2 cable (basically a wiggler with an LED)

- The Amontec JTAG Accelerator. This is a configuration for Amontec's Chameleon
dongle, a parallel port interface based on a Xilinx CoolRunner CPLD. It uses
the IEEE1284 EPP parallel port specification, providing many times the
performance achievable with wiggler-style devices. Additional information is
available on www.amontec.com.
Typical JTAG Accelerator speeds are around 120-160kByte/s to an ARM7's RAM.

- FTDI FT2232 based USB devices. The FT2232 (but not FT232 or FT245) features a
multi-protocol synchronous serial engine (MPSSE) that can be used to run the
serial JTAG protocol. There are several implemenations of FT2232 based devices:

* USBJTAG: http://www.fh-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html
The USBJTAG was designed by Prof. Hubert Hoegl to provide a high-speed USB
interface for use with the OpenOCD. Schematics are available at the USBJTAG
website, and a homebrew device can easily be built using the FTDI evaluation
module DLP2232M.

* OOCD-Link: http://www.joernonline.de/dw/doku.php?id=en:projects:oocdlink
Similar to the USBJTAG, this design comes with free schematics, too.

* Amontec JTAGkey: www.amontec.com
The Amontec JTAGkey offers support for a wide variety of target voltages from
1.4V to 5V. It also allows the JTAG lines and reset signals to be tri-stated,
allowing easy interfacing with a wide variety of targets.

* Amontec JTAGkey-Tiny: www.amontec.com
The Amontec JTAGkey offers support for a wide variety of target voltages from
2.8V to 5V. It also allows the reset signals to be tri-stated, allowing easy
interfacing with a wide variety of targets.

* Olimex ARM-USB-OCD: www.olimex.com
The Olimex ARM-USB-OCD offers support for a wide vriety of target voltages from
2.0V to 5V. It also allows targets to be powered from the ARM-USB-OCD and
features and additional RS232 UART.

* eVerve Signalyzer: www.signalyzer.com
The Signalyzer offers support for a wide variety of target voltages from 1.2V to
5.5V. A second connector provides access to a TTL level UART.

* TinCanTools 'Flyswatter' USB JTAG programmer.

* Turtelizer 2: http://www.ethernut.de/en/hardware/turtelizer/index.html
Another USB JTAG programmer, with freely available schematics. It supports
target voltages from 1.65V to 5.5V.

* Hitex STR9-comStick: http://www.ehitex.de/p_info.php?products_id=292
A STR912FW44x microcontroller "board" with USB and JTAG functionality.

* Hitex STM32-PerformanceStick: http://www.hitex.com/stm32-stick/
A STM32F103RBT6 microcontroller "board" with USB and JTAG functionality.

* Luminary Micro development board evb_lm3s811 JTAG interface.

* ASIX PRESTO: http://www.asix-tools.com/prg_presto.htm
The ASIX PRESTO is a USB JTAG programmer for a wide range of components, e.g.
microcontrollers, serial EEPROM and Flash memory chips, CPLDs and others.

* usbprog: http://www.embedded-projects.net/index.php?page_id=165
The usbprog is a freely programmable USB adapter, which can (among other
things) use a firmware which turns it into a JTAG programmer/debugger.

* Altium universal JTAG cable

All FT2232 based devices may be accessed using either FTDI's proprietary FTD2XX
library (www.ftdichip.com) or using an open-source replacement from
http://www.intra2net.com/de/produkte/opensource/ftdi/index.php, also included
with many Linux distributions.

2. Supported cores

This version of openocd supports the following ARM7/9 cores:

- ARM7TDMI(-s)
- ARM9TDMI
- ARM920t
- ARM922t
- ARM926ej-s
- ARM966e
- Cortex-M3

Support for Intel XScale CPUs is also included:

- PXA25x
- PXA27x
- IXP42x

And support for the Marvell Feroceon CPU core as found in the
Orion SoC family is included as well.

3. Host platforms

OpenOCD was originally developed on x86-Linux, but has since then been ported
to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, IA64-Linux,
AMD64-Linux, Alpha-Linux, ARM-Linux, and PowerPC OS-X.

4. Documentation

Documentation for the OpenOCD is hosted in the Berlios OpenFacts Wiki at
http://openfacts.berlios.de/index-en.phtml?title=Open_On-Chip_Debugger.

There is also and openocd(1) manpage, the 'openocd --help' output and
an OpenOCD info page (type 'info openocd').

5. Coding Style

The following rules try to describe formatting and naming conventions that
should be followed to make the whole OpenOCD code look more consistent.
The ultimate goal of coding style should be readability, and these rules may
be ignored for a particular (small) piece of code if that makes it more
readable.

Formatting rules:
- remove any trailing white space
- use TAB characters for indentation, not spaces
- displayed TAB width is 4 characters
- make sure NOT to use DOS '\r\n' line feeds
- do not add more than 2 empty lines to source files
- do not add trailing empty lines to source files
- do not use C++ style comments (//)
- lines may be reasonably wide - there's no anachronistic 80 characters limit

Naming rules:
- identifiers use lower-case letters only
- identifiers consisting of multiple words use underline characters between
consecutive words
- macros use upper-case letters only
- structure names shall be appended with '_s'
- typedefs shall be appended with '_t'

Function calls:
- function calls have no space between the functions name and the parameter
list: my_func(param1, param2, ...)

6. Licensing

OpenOCD is licensed under the terms of the GNU General Public License, see the
file COPYING for details.