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  1. /***************************************************************************
  2. * Copyright (C) 2005 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * Copyright (C) 2008 by Spencer Oliver *
  6. * spen@spen-soft.co.uk *
  7. * *
  8. * Copyright (C) 2009 by √ėyvind Harboe *
  9. * oyvind.harboe@zylin.com *
  10. * *
  11. * This program is free software; you can redistribute it and/or modify *
  12. * it under the terms of the GNU General Public License as published by *
  13. * the Free Software Foundation; either version 2 of the License, or *
  14. * (at your option) any later version. *
  15. * *
  16. * This program is distributed in the hope that it will be useful, *
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  19. * GNU General Public License for more details. *
  20. * *
  21. * You should have received a copy of the GNU General Public License *
  22. * along with this program; if not, write to the *
  23. * Free Software Foundation, Inc., *
  24. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  25. ***************************************************************************/
  26. #ifndef ARMV4_5_H
  27. #define ARMV4_5_H
  28. /* This stuff "knows" that its callers aren't talking
  29. * to microcontroller profile (current Cortex-M) parts.
  30. * We want to phase it out so core code can be shared.
  31. */
  32. /* OBSOLETE, DO NOT USE IN NEW CODE! The "number" of an arm_mode is an
  33. * index into the armv4_5_core_reg_map array. Its remaining users are
  34. * remnants which could as easily walk * the register cache directly as
  35. * use the expensive ARMV4_5_CORE_REG_MODE() macro.
  36. */
  37. int arm_mode_to_number(enum arm_mode mode);
  38. enum arm_mode armv4_5_number_to_mode(int number);
  39. extern const int armv4_5_core_reg_map[8][17];
  40. #define ARMV4_5_CORE_REG_MODE(cache, mode, num) \
  41. cache->reg_list[armv4_5_core_reg_map[arm_mode_to_number(mode)][num]]
  42. /* offset into armv4_5 core register cache -- OBSOLETE, DO NOT USE! */
  43. enum { ARMV4_5_CPSR = 31, };
  44. #endif /* ARMV4_5_H */