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  1. /***************************************************************************
  2. * Copyright (C) 2005 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * This program is free software; you can redistribute it and/or modify *
  6. * it under the terms of the GNU General Public License as published by *
  7. * the Free Software Foundation; either version 2 of the License, or *
  8. * (at your option) any later version. *
  9. * *
  10. * This program is distributed in the hope that it will be useful, *
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  13. * GNU General Public License for more details. *
  14. * *
  15. * You should have received a copy of the GNU General Public License *
  16. * along with this program; if not, write to the *
  17. * Free Software Foundation, Inc., *
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  19. ***************************************************************************/
  20. #ifndef ARMV4_5_MMU_H
  21. #define ARMV4_5_MMU_H
  22. #include "armv4_5_cache.h"
  23. struct target;
  24. struct armv4_5_mmu_common
  25. {
  26. uint32_t (*get_ttb)(struct target *target);
  27. int (*read_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
  28. int (*write_memory)(struct target *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
  29. void (*disable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
  30. void (*enable_mmu_caches)(struct target *target, int mmu, int d_u_cache, int i_cache);
  31. struct armv4_5_cache_common armv4_5_cache;
  32. int has_tiny_pages;
  33. int mmu_enabled;
  34. };
  35. enum
  36. {
  37. ARMV4_5_SECTION, ARMV4_5_LARGE_PAGE, ARMV4_5_SMALL_PAGE, ARMV4_5_TINY_PAGE
  38. };
  39. extern char* armv4_5_page_type_names[];
  40. uint32_t armv4_5_mmu_translate_va(struct target *target,
  41. struct armv4_5_mmu_common *armv4_5_mmu, uint32_t va, int *type,
  42. uint32_t *cb, int *domain, uint32_t *ap);
  43. int armv4_5_mmu_read_physical(struct target *target,
  44. struct armv4_5_mmu_common *armv4_5_mmu,
  45. uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
  46. int armv4_5_mmu_write_physical(struct target *target,
  47. struct armv4_5_mmu_common *armv4_5_mmu,
  48. uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
  49. enum
  50. {
  51. ARMV4_5_MMU_ENABLED = 0x1,
  52. ARMV4_5_ALIGNMENT_CHECK = 0x2,
  53. ARMV4_5_MMU_S_BIT = 0x100,
  54. ARMV4_5_MMU_R_BIT = 0x200
  55. };
  56. #endif /* ARMV4_5_MMU_H */