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  1. #
  2. # NXP lpc11uxx family
  3. source [find target/swj-dp.tcl]
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME lpc11uxx
  8. }
  9. if { [info exists ENDIAN] } {
  10. set _ENDIAN $ENDIAN
  11. } else {
  12. set _ENDIAN little
  13. }
  14. # Work-area is a space in RAM used for flash programming
  15. # By default use 6kB
  16. if { [info exists WORKAREASIZE] } {
  17. set _WORKAREASIZE $WORKAREASIZE
  18. } else {
  19. set _WORKAREASIZE 0x1800
  20. }
  21. if { [info exists CPUTAPID] } {
  22. set _CPUTAPID $CPUTAPID
  23. } else {
  24. set _CPUTAPID 0x00000000
  25. }
  26. # delays on reset lines
  27. adapter_nsrst_delay 100
  28. #jtag_ntrst_delay 100
  29. swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
  30. set _TARGETNAME $_CHIPNAME.cpu
  31. target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  32. $_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
  33. #set _FLASHNAME $_CHIPNAME.flash
  34. #flash bank $_FLASHNAME lpc2000 0 0 0 0 $_TARGETNAME
  35. # if srst is not fitted use SYSRESETREQ to
  36. # perform a soft reset
  37. cortex_m reset_config sysresetreq