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  1. /***************************************************************************
  2. * Copyright (C) 2005 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * Copyright (C) 2008 by Spencer Oliver *
  6. * spen@spen-soft.co.uk *
  7. * *
  8. * This program is free software; you can redistribute it and/or modify *
  9. * it under the terms of the GNU General Public License as published by *
  10. * the Free Software Foundation; either version 2 of the License, or *
  11. * (at your option) any later version. *
  12. * *
  13. * This program is distributed in the hope that it will be useful, *
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  16. * GNU General Public License for more details. *
  17. * *
  18. * You should have received a copy of the GNU General Public License *
  19. * along with this program; if not, write to the *
  20. * Free Software Foundation, Inc., *
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  22. ***************************************************************************/
  23. #ifdef HAVE_CONFIG_H
  24. #include "config.h"
  25. #endif
  26. #include "str9xpec.h"
  27. #include "arm7_9_common.h"
  28. static int str9xpec_register_commands(struct command_context_s *cmd_ctx);
  29. static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
  30. static int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
  31. static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last);
  32. static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
  33. static int str9xpec_probe(struct flash_bank_s *bank);
  34. static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  35. static int str9xpec_protect_check(struct flash_bank_s *bank);
  36. static int str9xpec_erase_check(struct flash_bank_s *bank);
  37. static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size);
  38. static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last);
  39. static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector);
  40. static int str9xpec_write_options(struct flash_bank_s *bank);
  41. static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  42. static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  43. static int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44. static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45. static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46. static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47. static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48. static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49. static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50. static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51. flash_driver_t str9xpec_flash =
  52. {
  53. .name = "str9xpec",
  54. .register_commands = str9xpec_register_commands,
  55. .flash_bank_command = str9xpec_flash_bank_command,
  56. .erase = str9xpec_erase,
  57. .protect = str9xpec_protect,
  58. .write = str9xpec_write,
  59. .probe = str9xpec_probe,
  60. .auto_probe = str9xpec_probe,
  61. .erase_check = str9xpec_erase_check,
  62. .protect_check = str9xpec_protect_check,
  63. .info = str9xpec_info
  64. };
  65. static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
  66. {
  67. command_t *str9xpec_cmd = register_command(cmd_ctx, NULL, "str9xpec", NULL, COMMAND_ANY, "str9xpec flash specific commands");
  68. register_command(cmd_ctx, str9xpec_cmd, "enable_turbo", str9xpec_handle_flash_enable_turbo_command, COMMAND_EXEC,
  69. "enable str9xpec turbo mode");
  70. register_command(cmd_ctx, str9xpec_cmd, "disable_turbo", str9xpec_handle_flash_disable_turbo_command, COMMAND_EXEC,
  71. "disable str9xpec turbo mode");
  72. register_command(cmd_ctx, str9xpec_cmd, "options_cmap", str9xpec_handle_flash_options_cmap_command, COMMAND_EXEC,
  73. "configure str9xpec boot sector");
  74. register_command(cmd_ctx, str9xpec_cmd, "options_lvdthd", str9xpec_handle_flash_options_lvdthd_command, COMMAND_EXEC,
  75. "configure str9xpec lvd threshold");
  76. register_command(cmd_ctx, str9xpec_cmd, "options_lvdsel", str9xpec_handle_flash_options_lvdsel_command, COMMAND_EXEC,
  77. "configure str9xpec lvd selection");
  78. register_command(cmd_ctx, str9xpec_cmd, "options_lvdwarn", str9xpec_handle_flash_options_lvdwarn_command, COMMAND_EXEC,
  79. "configure str9xpec lvd warning");
  80. register_command(cmd_ctx, str9xpec_cmd, "options_read", str9xpec_handle_flash_options_read_command, COMMAND_EXEC,
  81. "read str9xpec options");
  82. register_command(cmd_ctx, str9xpec_cmd, "options_write", str9xpec_handle_flash_options_write_command, COMMAND_EXEC,
  83. "write str9xpec options");
  84. register_command(cmd_ctx, str9xpec_cmd, "lock", str9xpec_handle_flash_lock_command, COMMAND_EXEC,
  85. "lock str9xpec device");
  86. register_command(cmd_ctx, str9xpec_cmd, "unlock", str9xpec_handle_flash_unlock_command, COMMAND_EXEC,
  87. "unlock str9xpec device");
  88. register_command(cmd_ctx, str9xpec_cmd, "part_id", str9xpec_handle_part_id_command, COMMAND_EXEC,
  89. "print part id of str9xpec flash bank <num>");
  90. return ERROR_OK;
  91. }
  92. int str9xpec_set_instr(jtag_tap_t *tap, uint32_t new_instr, tap_state_t end_state)
  93. {
  94. if (tap == NULL) {
  95. return ERROR_TARGET_INVALID;
  96. }
  97. if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
  98. {
  99. scan_field_t field;
  100. field.tap = tap;
  101. field.num_bits = tap->ir_length;
  102. field.out_value = calloc(CEIL(field.num_bits, 8), 1);
  103. buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
  104. field.in_value = NULL;
  105. jtag_add_ir_scan(1, &field, end_state);
  106. free(field.out_value);
  107. }
  108. return ERROR_OK;
  109. }
  110. static uint8_t str9xpec_isc_status(jtag_tap_t *tap)
  111. {
  112. scan_field_t field;
  113. uint8_t status;
  114. if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
  115. return ISC_STATUS_ERROR;
  116. field.tap = tap;
  117. field.num_bits = 8;
  118. field.out_value = NULL;
  119. field.in_value = &status;
  120. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  121. jtag_execute_queue();
  122. LOG_DEBUG("status: 0x%2.2x", status);
  123. if (status & ISC_STATUS_SECURITY)
  124. LOG_INFO("Device Security Bit Set");
  125. return status;
  126. }
  127. static int str9xpec_isc_enable(struct flash_bank_s *bank)
  128. {
  129. uint8_t status;
  130. jtag_tap_t *tap;
  131. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  132. tap = str9xpec_info->tap;
  133. if (str9xpec_info->isc_enable)
  134. return ERROR_OK;
  135. /* enter isc mode */
  136. if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
  137. return ERROR_TARGET_INVALID;
  138. /* check ISC status */
  139. status = str9xpec_isc_status(tap);
  140. if (status & ISC_STATUS_MODE)
  141. {
  142. /* we have entered isc mode */
  143. str9xpec_info->isc_enable = 1;
  144. LOG_DEBUG("ISC_MODE Enabled");
  145. }
  146. return ERROR_OK;
  147. }
  148. static int str9xpec_isc_disable(struct flash_bank_s *bank)
  149. {
  150. uint8_t status;
  151. jtag_tap_t *tap;
  152. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  153. tap = str9xpec_info->tap;
  154. if (!str9xpec_info->isc_enable)
  155. return ERROR_OK;
  156. if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
  157. return ERROR_TARGET_INVALID;
  158. /* delay to handle aborts */
  159. jtag_add_sleep(50);
  160. /* check ISC status */
  161. status = str9xpec_isc_status(tap);
  162. if (!(status & ISC_STATUS_MODE))
  163. {
  164. /* we have left isc mode */
  165. str9xpec_info->isc_enable = 0;
  166. LOG_DEBUG("ISC_MODE Disabled");
  167. }
  168. return ERROR_OK;
  169. }
  170. static int str9xpec_read_config(struct flash_bank_s *bank)
  171. {
  172. scan_field_t field;
  173. uint8_t status;
  174. jtag_tap_t *tap;
  175. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  176. tap = str9xpec_info->tap;
  177. LOG_DEBUG("ISC_CONFIGURATION");
  178. /* execute ISC_CONFIGURATION command */
  179. str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
  180. field.tap = tap;
  181. field.num_bits = 64;
  182. field.out_value = NULL;
  183. field.in_value = str9xpec_info->options;
  184. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  185. jtag_execute_queue();
  186. status = str9xpec_isc_status(tap);
  187. return status;
  188. }
  189. static int str9xpec_build_block_list(struct flash_bank_s *bank)
  190. {
  191. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  192. int i;
  193. int num_sectors;
  194. int b0_sectors = 0, b1_sectors = 0;
  195. uint32_t offset = 0;
  196. int b1_size = 0x2000;
  197. switch (bank->size)
  198. {
  199. case (256 * 1024):
  200. b0_sectors = 4;
  201. break;
  202. case (512 * 1024):
  203. b0_sectors = 8;
  204. break;
  205. case (1024 * 1024):
  206. b0_sectors = 16;
  207. break;
  208. case (2048 * 1024):
  209. b0_sectors = 32;
  210. break;
  211. case (128 * 1024):
  212. b1_size = 0x4000;
  213. b1_sectors = 8;
  214. break;
  215. case (32 * 1024):
  216. b1_sectors = 4;
  217. break;
  218. default:
  219. LOG_ERROR("BUG: unknown bank->size encountered");
  220. exit(-1);
  221. }
  222. num_sectors = b0_sectors + b1_sectors;
  223. bank->num_sectors = num_sectors;
  224. bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
  225. str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
  226. num_sectors = 0;
  227. for (i = 0; i < b0_sectors; i++)
  228. {
  229. bank->sectors[num_sectors].offset = offset;
  230. bank->sectors[num_sectors].size = 0x10000;
  231. offset += bank->sectors[i].size;
  232. bank->sectors[num_sectors].is_erased = -1;
  233. bank->sectors[num_sectors].is_protected = 1;
  234. str9xpec_info->sector_bits[num_sectors++] = i;
  235. }
  236. for (i = 0; i < b1_sectors; i++)
  237. {
  238. bank->sectors[num_sectors].offset = offset;
  239. bank->sectors[num_sectors].size = b1_size;
  240. offset += bank->sectors[i].size;
  241. bank->sectors[num_sectors].is_erased = -1;
  242. bank->sectors[num_sectors].is_protected = 1;
  243. str9xpec_info->sector_bits[num_sectors++] = i + 32;
  244. }
  245. return ERROR_OK;
  246. }
  247. /* flash bank str9x <base> <size> 0 0 <target#>
  248. */
  249. static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
  250. {
  251. str9xpec_flash_controller_t *str9xpec_info;
  252. armv4_5_common_t *armv4_5 = NULL;
  253. arm7_9_common_t *arm7_9 = NULL;
  254. arm_jtag_t *jtag_info = NULL;
  255. if (argc < 6)
  256. {
  257. LOG_WARNING("incomplete flash_bank str9x configuration");
  258. return ERROR_FLASH_BANK_INVALID;
  259. }
  260. str9xpec_info = malloc(sizeof(str9xpec_flash_controller_t));
  261. bank->driver_priv = str9xpec_info;
  262. /* REVISIT verify that the jtag position of flash controller is
  263. * right after *THIS* core, which must be a STR9xx core ...
  264. */
  265. armv4_5 = bank->target->arch_info;
  266. arm7_9 = armv4_5->arch_info;
  267. jtag_info = &arm7_9->jtag_info;
  268. str9xpec_info->tap = bank->target->tap;
  269. str9xpec_info->isc_enable = 0;
  270. str9xpec_build_block_list(bank);
  271. /* clear option byte register */
  272. buf_set_u32(str9xpec_info->options, 0, 64, 0);
  273. return ERROR_OK;
  274. }
  275. static int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
  276. {
  277. scan_field_t field;
  278. uint8_t status;
  279. jtag_tap_t *tap;
  280. int i;
  281. uint8_t *buffer = NULL;
  282. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  283. tap = str9xpec_info->tap;
  284. if (!str9xpec_info->isc_enable) {
  285. str9xpec_isc_enable(bank);
  286. }
  287. if (!str9xpec_info->isc_enable) {
  288. return ERROR_FLASH_OPERATION_FAILED;
  289. }
  290. buffer = calloc(CEIL(64, 8), 1);
  291. LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
  292. for (i = first; i <= last; i++) {
  293. buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
  294. }
  295. /* execute ISC_BLANK_CHECK command */
  296. str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
  297. field.tap = tap;
  298. field.num_bits = 64;
  299. field.out_value = buffer;
  300. field.in_value = NULL;
  301. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  302. jtag_add_sleep(40000);
  303. /* read blank check result */
  304. field.tap = tap;
  305. field.num_bits = 64;
  306. field.out_value = NULL;
  307. field.in_value = buffer;
  308. jtag_add_dr_scan(1, &field, TAP_IRPAUSE);
  309. jtag_execute_queue();
  310. status = str9xpec_isc_status(tap);
  311. for (i = first; i <= last; i++)
  312. {
  313. if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
  314. bank->sectors[i].is_erased = 0;
  315. else
  316. bank->sectors[i].is_erased = 1;
  317. }
  318. free(buffer);
  319. str9xpec_isc_disable(bank);
  320. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  321. return ERROR_FLASH_OPERATION_FAILED;
  322. return ERROR_OK;
  323. }
  324. static int str9xpec_protect_check(struct flash_bank_s *bank)
  325. {
  326. uint8_t status;
  327. int i;
  328. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  329. status = str9xpec_read_config(bank);
  330. for (i = 0; i < bank->num_sectors; i++)
  331. {
  332. if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
  333. bank->sectors[i].is_protected = 1;
  334. else
  335. bank->sectors[i].is_protected = 0;
  336. }
  337. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  338. return ERROR_FLASH_OPERATION_FAILED;
  339. return ERROR_OK;
  340. }
  341. static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
  342. {
  343. scan_field_t field;
  344. uint8_t status;
  345. jtag_tap_t *tap;
  346. int i;
  347. uint8_t *buffer = NULL;
  348. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  349. tap = str9xpec_info->tap;
  350. if (!str9xpec_info->isc_enable) {
  351. str9xpec_isc_enable(bank);
  352. }
  353. if (!str9xpec_info->isc_enable) {
  354. return ISC_STATUS_ERROR;
  355. }
  356. buffer = calloc(CEIL(64, 8), 1);
  357. LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
  358. /* last bank: 0xFF signals a full erase (unlock complete device) */
  359. /* last bank: 0xFE signals a option byte erase */
  360. if (last == 0xFF)
  361. {
  362. for (i = 0; i < 64; i++) {
  363. buf_set_u32(buffer, i, 1, 1);
  364. }
  365. }
  366. else if (last == 0xFE)
  367. {
  368. buf_set_u32(buffer, 49, 1, 1);
  369. }
  370. else
  371. {
  372. for (i = first; i <= last; i++) {
  373. buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
  374. }
  375. }
  376. LOG_DEBUG("ISC_ERASE");
  377. /* execute ISC_ERASE command */
  378. str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
  379. field.tap = tap;
  380. field.num_bits = 64;
  381. field.out_value = buffer;
  382. field.in_value = NULL;
  383. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  384. jtag_execute_queue();
  385. jtag_add_sleep(10);
  386. /* wait for erase completion */
  387. while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
  388. alive_sleep(1);
  389. }
  390. free(buffer);
  391. str9xpec_isc_disable(bank);
  392. return status;
  393. }
  394. static int str9xpec_erase(struct flash_bank_s *bank, int first, int last)
  395. {
  396. int status;
  397. status = str9xpec_erase_area(bank, first, last);
  398. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  399. return ERROR_FLASH_OPERATION_FAILED;
  400. return ERROR_OK;
  401. }
  402. static int str9xpec_lock_device(struct flash_bank_s *bank)
  403. {
  404. scan_field_t field;
  405. uint8_t status;
  406. jtag_tap_t *tap;
  407. str9xpec_flash_controller_t *str9xpec_info = NULL;
  408. str9xpec_info = bank->driver_priv;
  409. tap = str9xpec_info->tap;
  410. if (!str9xpec_info->isc_enable) {
  411. str9xpec_isc_enable(bank);
  412. }
  413. if (!str9xpec_info->isc_enable) {
  414. return ISC_STATUS_ERROR;
  415. }
  416. /* set security address */
  417. str9xpec_set_address(bank, 0x80);
  418. /* execute ISC_PROGRAM command */
  419. str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
  420. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  421. do {
  422. field.tap = tap;
  423. field.num_bits = 8;
  424. field.out_value = NULL;
  425. field.in_value = &status;
  426. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  427. jtag_execute_queue();
  428. } while (!(status & ISC_STATUS_BUSY));
  429. str9xpec_isc_disable(bank);
  430. return status;
  431. }
  432. static int str9xpec_unlock_device(struct flash_bank_s *bank)
  433. {
  434. uint8_t status;
  435. status = str9xpec_erase_area(bank, 0, 255);
  436. return status;
  437. }
  438. static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
  439. {
  440. uint8_t status;
  441. int i;
  442. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  443. status = str9xpec_read_config(bank);
  444. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  445. return ERROR_FLASH_OPERATION_FAILED;
  446. LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
  447. /* last bank: 0xFF signals a full device protect */
  448. if (last == 0xFF)
  449. {
  450. if (set)
  451. {
  452. status = str9xpec_lock_device(bank);
  453. }
  454. else
  455. {
  456. /* perform full erase to unlock device */
  457. status = str9xpec_unlock_device(bank);
  458. }
  459. }
  460. else
  461. {
  462. for (i = first; i <= last; i++)
  463. {
  464. if (set)
  465. buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
  466. else
  467. buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
  468. }
  469. status = str9xpec_write_options(bank);
  470. }
  471. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  472. return ERROR_FLASH_OPERATION_FAILED;
  473. return ERROR_OK;
  474. }
  475. static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector)
  476. {
  477. jtag_tap_t *tap;
  478. scan_field_t field;
  479. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  480. tap = str9xpec_info->tap;
  481. /* set flash controller address */
  482. str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
  483. field.tap = tap;
  484. field.num_bits = 8;
  485. field.out_value = &sector;
  486. field.in_value = NULL;
  487. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  488. return ERROR_OK;
  489. }
  490. static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
  491. {
  492. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  493. uint32_t dwords_remaining = (count / 8);
  494. uint32_t bytes_remaining = (count & 0x00000007);
  495. uint32_t bytes_written = 0;
  496. uint8_t status;
  497. uint32_t check_address = offset;
  498. jtag_tap_t *tap;
  499. scan_field_t field;
  500. uint8_t *scanbuf;
  501. int i;
  502. int first_sector = 0;
  503. int last_sector = 0;
  504. tap = str9xpec_info->tap;
  505. if (!str9xpec_info->isc_enable) {
  506. str9xpec_isc_enable(bank);
  507. }
  508. if (!str9xpec_info->isc_enable) {
  509. return ERROR_FLASH_OPERATION_FAILED;
  510. }
  511. if (offset & 0x7)
  512. {
  513. LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
  514. return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
  515. }
  516. for (i = 0; i < bank->num_sectors; i++)
  517. {
  518. uint32_t sec_start = bank->sectors[i].offset;
  519. uint32_t sec_end = sec_start + bank->sectors[i].size;
  520. /* check if destination falls within the current sector */
  521. if ((check_address >= sec_start) && (check_address < sec_end))
  522. {
  523. /* check if destination ends in the current sector */
  524. if (offset + count < sec_end)
  525. check_address = offset + count;
  526. else
  527. check_address = sec_end;
  528. }
  529. if ((offset >= sec_start) && (offset < sec_end)) {
  530. first_sector = i;
  531. }
  532. if ((offset + count >= sec_start) && (offset + count < sec_end)) {
  533. last_sector = i;
  534. }
  535. }
  536. if (check_address != offset + count)
  537. return ERROR_FLASH_DST_OUT_OF_BANK;
  538. LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
  539. scanbuf = calloc(CEIL(64, 8), 1);
  540. LOG_DEBUG("ISC_PROGRAM");
  541. for (i = first_sector; i <= last_sector; i++)
  542. {
  543. str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
  544. dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);
  545. while (dwords_remaining > 0)
  546. {
  547. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  548. field.tap = tap;
  549. field.num_bits = 64;
  550. field.out_value = (buffer + bytes_written);
  551. field.in_value = NULL;
  552. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  553. /* small delay before polling */
  554. jtag_add_sleep(50);
  555. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  556. do {
  557. field.tap = tap;
  558. field.num_bits = 8;
  559. field.out_value = NULL;
  560. field.in_value = scanbuf;
  561. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  562. jtag_execute_queue();
  563. status = buf_get_u32(scanbuf, 0, 8);
  564. } while (!(status & ISC_STATUS_BUSY));
  565. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  566. return ERROR_FLASH_OPERATION_FAILED;
  567. /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
  568. return ERROR_FLASH_OPERATION_FAILED; */
  569. dwords_remaining--;
  570. bytes_written += 8;
  571. }
  572. }
  573. if (bytes_remaining)
  574. {
  575. uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  576. int i = 0;
  577. while (bytes_remaining > 0)
  578. {
  579. last_dword[i++] = *(buffer + bytes_written);
  580. bytes_remaining--;
  581. bytes_written++;
  582. }
  583. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  584. field.tap = tap;
  585. field.num_bits = 64;
  586. field.out_value = last_dword;
  587. field.in_value = NULL;
  588. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  589. /* small delay before polling */
  590. jtag_add_sleep(50);
  591. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  592. do {
  593. field.tap = tap;
  594. field.num_bits = 8;
  595. field.out_value = NULL;
  596. field.in_value = scanbuf;
  597. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  598. jtag_execute_queue();
  599. status = buf_get_u32(scanbuf, 0, 8);
  600. } while (!(status & ISC_STATUS_BUSY));
  601. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  602. return ERROR_FLASH_OPERATION_FAILED;
  603. /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
  604. return ERROR_FLASH_OPERATION_FAILED; */
  605. }
  606. free(scanbuf);
  607. str9xpec_isc_disable(bank);
  608. return ERROR_OK;
  609. }
  610. static int str9xpec_probe(struct flash_bank_s *bank)
  611. {
  612. return ERROR_OK;
  613. }
  614. static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  615. {
  616. flash_bank_t *bank;
  617. scan_field_t field;
  618. uint8_t *buffer = NULL;
  619. jtag_tap_t *tap;
  620. uint32_t idcode;
  621. str9xpec_flash_controller_t *str9xpec_info = NULL;
  622. if (argc < 1)
  623. {
  624. return ERROR_COMMAND_SYNTAX_ERROR;
  625. }
  626. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  627. if (!bank)
  628. {
  629. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  630. return ERROR_OK;
  631. }
  632. str9xpec_info = bank->driver_priv;
  633. tap = str9xpec_info->tap;
  634. buffer = calloc(CEIL(32, 8), 1);
  635. str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
  636. field.tap = tap;
  637. field.num_bits = 32;
  638. field.out_value = NULL;
  639. field.in_value = buffer;
  640. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  641. jtag_execute_queue();
  642. idcode = buf_get_u32(buffer, 0, 32);
  643. command_print(cmd_ctx, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
  644. free(buffer);
  645. return ERROR_OK;
  646. }
  647. static int str9xpec_erase_check(struct flash_bank_s *bank)
  648. {
  649. return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
  650. }
  651. static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size)
  652. {
  653. snprintf(buf, buf_size, "str9xpec flash driver info");
  654. return ERROR_OK;
  655. }
  656. static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  657. {
  658. flash_bank_t *bank;
  659. uint8_t status;
  660. str9xpec_flash_controller_t *str9xpec_info = NULL;
  661. if (argc < 1)
  662. {
  663. command_print(cmd_ctx, "str9xpec options_read <bank>");
  664. return ERROR_OK;
  665. }
  666. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  667. if (!bank)
  668. {
  669. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  670. return ERROR_OK;
  671. }
  672. str9xpec_info = bank->driver_priv;
  673. status = str9xpec_read_config(bank);
  674. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  675. return ERROR_FLASH_OPERATION_FAILED;
  676. /* boot bank */
  677. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
  678. command_print(cmd_ctx, "CS Map: bank1");
  679. else
  680. command_print(cmd_ctx, "CS Map: bank0");
  681. /* OTP lock */
  682. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
  683. command_print(cmd_ctx, "OTP Lock: OTP Locked");
  684. else
  685. command_print(cmd_ctx, "OTP Lock: OTP Unlocked");
  686. /* LVD Threshold */
  687. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
  688. command_print(cmd_ctx, "LVD Threshold: 2.7v");
  689. else
  690. command_print(cmd_ctx, "LVD Threshold: 2.4v");
  691. /* LVD reset warning */
  692. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
  693. command_print(cmd_ctx, "LVD Reset Warning: VDD or VDDQ Inputs");
  694. else
  695. command_print(cmd_ctx, "LVD Reset Warning: VDD Input Only");
  696. /* LVD reset select */
  697. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
  698. command_print(cmd_ctx, "LVD Reset Selection: VDD or VDDQ Inputs");
  699. else
  700. command_print(cmd_ctx, "LVD Reset Selection: VDD Input Only");
  701. return ERROR_OK;
  702. }
  703. static int str9xpec_write_options(struct flash_bank_s *bank)
  704. {
  705. scan_field_t field;
  706. uint8_t status;
  707. jtag_tap_t *tap;
  708. str9xpec_flash_controller_t *str9xpec_info = NULL;
  709. str9xpec_info = bank->driver_priv;
  710. tap = str9xpec_info->tap;
  711. /* erase config options first */
  712. status = str9xpec_erase_area(bank, 0xFE, 0xFE);
  713. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  714. return status;
  715. if (!str9xpec_info->isc_enable) {
  716. str9xpec_isc_enable(bank);
  717. }
  718. if (!str9xpec_info->isc_enable) {
  719. return ISC_STATUS_ERROR;
  720. }
  721. /* according to data 64th bit has to be set */
  722. buf_set_u32(str9xpec_info->options, 63, 1, 1);
  723. /* set option byte address */
  724. str9xpec_set_address(bank, 0x50);
  725. /* execute ISC_PROGRAM command */
  726. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  727. field.tap = tap;
  728. field.num_bits = 64;
  729. field.out_value = str9xpec_info->options;
  730. field.in_value = NULL;
  731. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  732. /* small delay before polling */
  733. jtag_add_sleep(50);
  734. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  735. do {
  736. field.tap = tap;
  737. field.num_bits = 8;
  738. field.out_value = NULL;
  739. field.in_value = &status;
  740. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  741. jtag_execute_queue();
  742. } while (!(status & ISC_STATUS_BUSY));
  743. str9xpec_isc_disable(bank);
  744. return status;
  745. }
  746. static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  747. {
  748. flash_bank_t *bank;
  749. uint8_t status;
  750. if (argc < 1)
  751. {
  752. command_print(cmd_ctx, "str9xpec options_write <bank>");
  753. return ERROR_OK;
  754. }
  755. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  756. if (!bank)
  757. {
  758. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  759. return ERROR_OK;
  760. }
  761. status = str9xpec_write_options(bank);
  762. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  763. return ERROR_FLASH_OPERATION_FAILED;
  764. return ERROR_OK;
  765. }
  766. static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  767. {
  768. flash_bank_t *bank;
  769. str9xpec_flash_controller_t *str9xpec_info = NULL;
  770. if (argc < 2)
  771. {
  772. command_print(cmd_ctx, "str9xpec options_cmap <bank> <bank0 | bank1>");
  773. return ERROR_OK;
  774. }
  775. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  776. if (!bank)
  777. {
  778. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  779. return ERROR_OK;
  780. }
  781. str9xpec_info = bank->driver_priv;
  782. if (strcmp(args[1], "bank1") == 0)
  783. {
  784. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 1);
  785. }
  786. else
  787. {
  788. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 0);
  789. }
  790. return ERROR_OK;
  791. }
  792. static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  793. {
  794. flash_bank_t *bank;
  795. str9xpec_flash_controller_t *str9xpec_info = NULL;
  796. if (argc < 2)
  797. {
  798. command_print(cmd_ctx, "str9xpec options_lvdthd <bank> <2.4v | 2.7v>");
  799. return ERROR_OK;
  800. }
  801. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  802. if (!bank)
  803. {
  804. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  805. return ERROR_OK;
  806. }
  807. str9xpec_info = bank->driver_priv;
  808. if (strcmp(args[1], "2.7v") == 0)
  809. {
  810. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 1);
  811. }
  812. else
  813. {
  814. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 0);
  815. }
  816. return ERROR_OK;
  817. }
  818. int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  819. {
  820. flash_bank_t *bank;
  821. str9xpec_flash_controller_t *str9xpec_info = NULL;
  822. if (argc < 2)
  823. {
  824. command_print(cmd_ctx, "str9xpec options_lvdsel <bank> <vdd | vdd_vddq>");
  825. return ERROR_OK;
  826. }
  827. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  828. if (!bank)
  829. {
  830. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  831. return ERROR_OK;
  832. }
  833. str9xpec_info = bank->driver_priv;
  834. if (strcmp(args[1], "vdd_vddq") == 0)
  835. {
  836. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 1);
  837. }
  838. else
  839. {
  840. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 0);
  841. }
  842. return ERROR_OK;
  843. }
  844. static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  845. {
  846. flash_bank_t *bank;
  847. str9xpec_flash_controller_t *str9xpec_info = NULL;
  848. if (argc < 2)
  849. {
  850. command_print(cmd_ctx, "str9xpec options_lvdwarn <bank> <vdd | vdd_vddq>");
  851. return ERROR_OK;
  852. }
  853. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  854. if (!bank)
  855. {
  856. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  857. return ERROR_OK;
  858. }
  859. str9xpec_info = bank->driver_priv;
  860. if (strcmp(args[1], "vdd_vddq") == 0)
  861. {
  862. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 1);
  863. }
  864. else
  865. {
  866. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 0);
  867. }
  868. return ERROR_OK;
  869. }
  870. static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  871. {
  872. uint8_t status;
  873. flash_bank_t *bank;
  874. if (argc < 1)
  875. {
  876. command_print(cmd_ctx, "str9xpec lock <bank>");
  877. return ERROR_OK;
  878. }
  879. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  880. if (!bank)
  881. {
  882. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  883. return ERROR_OK;
  884. }
  885. status = str9xpec_lock_device(bank);
  886. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  887. return ERROR_FLASH_OPERATION_FAILED;
  888. return ERROR_OK;
  889. }
  890. static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  891. {
  892. uint8_t status;
  893. flash_bank_t *bank;
  894. if (argc < 1)
  895. {
  896. command_print(cmd_ctx, "str9xpec unlock <bank>");
  897. return ERROR_OK;
  898. }
  899. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  900. if (!bank)
  901. {
  902. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  903. return ERROR_OK;
  904. }
  905. status = str9xpec_unlock_device(bank);
  906. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  907. return ERROR_FLASH_OPERATION_FAILED;
  908. return ERROR_OK;
  909. }
  910. static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  911. {
  912. int retval;
  913. flash_bank_t *bank;
  914. jtag_tap_t *tap0;
  915. jtag_tap_t *tap1;
  916. jtag_tap_t *tap2;
  917. str9xpec_flash_controller_t *str9xpec_info = NULL;
  918. if (argc < 1)
  919. {
  920. command_print(cmd_ctx, "str9xpec enable_turbo <bank>");
  921. return ERROR_OK;
  922. }
  923. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  924. if (!bank)
  925. {
  926. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  927. return ERROR_OK;
  928. }
  929. str9xpec_info = bank->driver_priv;
  930. tap0 = str9xpec_info->tap;
  931. /* remove arm core from chain - enter turbo mode */
  932. tap1 = tap0->next_tap;
  933. if (tap1 == NULL)
  934. {
  935. /* things are *WRONG* */
  936. command_print(cmd_ctx,"**STR9FLASH** (tap1) invalid chain?");
  937. return ERROR_OK;
  938. }
  939. tap2 = tap1->next_tap;
  940. if (tap2 == NULL)
  941. {
  942. /* things are *WRONG* */
  943. command_print(cmd_ctx,"**STR9FLASH** (tap2) invalid chain?");
  944. return ERROR_OK;
  945. }
  946. /* enable turbo mode - TURBO-PROG-ENABLE */
  947. str9xpec_set_instr(tap2, 0xD, TAP_IDLE);
  948. if ((retval = jtag_execute_queue()) != ERROR_OK)
  949. return retval;
  950. /* modify scan chain - str9 core has been removed */
  951. tap1->enabled = 0;
  952. return ERROR_OK;
  953. }
  954. static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  955. {
  956. flash_bank_t *bank;
  957. jtag_tap_t *tap;
  958. str9xpec_flash_controller_t *str9xpec_info = NULL;
  959. if (argc < 1)
  960. {
  961. command_print(cmd_ctx, "str9xpec disable_turbo <bank>");
  962. return ERROR_OK;
  963. }
  964. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  965. if (!bank)
  966. {
  967. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  968. return ERROR_OK;
  969. }
  970. str9xpec_info = bank->driver_priv;
  971. tap = str9xpec_info->tap;
  972. if (tap == NULL)
  973. return ERROR_FAIL;
  974. /* exit turbo mode via RESET */
  975. str9xpec_set_instr(tap, ISC_NOOP, TAP_IDLE);
  976. jtag_add_tlr();
  977. jtag_execute_queue();
  978. /* restore previous scan chain */
  979. if (tap->next_tap) {
  980. tap->next_tap->enabled = 1;
  981. }
  982. return ERROR_OK;
  983. }