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  1. # MB9BF506
  2. # Fujitsu Cortex-M3 with 512kB Flash and 64kB RAM
  3. source [find target/swj-dp.tcl]
  4. if { [info exists CHIPNAME] } {
  5. set _CHIPNAME $CHIPNAME
  6. } else {
  7. set _CHIPNAME mb9bfxx6
  8. }
  9. if { [info exists ENDIAN] } {
  10. set _ENDIAN $ENDIAN
  11. } else {
  12. set _ENDIAN little
  13. }
  14. if { [info exists CPUTAPID] } {
  15. set _CPUTAPID $CPUTAPID
  16. } else {
  17. set _CPUTAPID 0x4ba00477
  18. }
  19. # delays on reset lines
  20. adapter_nsrst_delay 100
  21. if {[using_jtag]} {
  22. jtag_ntrst_delay 100
  23. }
  24. # Fujitsu cortex-M3 reset configuration
  25. reset_config trst_only
  26. swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  27. set _TARGETNAME $_CHIPNAME.cpu
  28. target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
  29. # MB9BF506 has 64kB of SRAM on its main system bus
  30. $_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
  31. # MB9BF506 has 512kB internal FLASH
  32. set _FLASHNAME $_CHIPNAME.flash
  33. flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
  34. # 4MHz / 6 = 666kHz, so use 500
  35. adapter_khz 500
  36. if {![using_hla]} {
  37. # if srst is not fitted use SYSRESETREQ to
  38. # perform a soft reset
  39. cortex_m reset_config sysresetreq
  40. }