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  1. # page 3-34 of "MCIMC27 Multimedia Applications Processor Reference Manual, Rev 0.3"
  2. # SRST pulls TRST
  3. #
  4. # Without setting these options correctly you'll see all sorts
  5. # of weird errors, e.g. MOE=0xe, invalid cpsr values, reset
  6. # failing, etc.
  7. reset_config trst_and_srst srst_pulls_trst
  8. if { [info exists CHIPNAME] } {
  9. set _CHIPNAME $CHIPNAME
  10. } else {
  11. set _CHIPNAME imx27
  12. }
  13. if { [info exists ENDIAN] } {
  14. set _ENDIAN $ENDIAN
  15. } else {
  16. set _ENDIAN little
  17. }
  18. # Note above there are 2 taps
  19. # trace buffer
  20. if { [info exists ETBTAPID] } {
  21. set _ETBTAPID $ETBTAPID
  22. } else {
  23. set _ETBTAPID 0x1b900f0f
  24. }
  25. jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
  26. # The CPU tap
  27. if { [info exists CPUTAPID] } {
  28. set _CPUTAPID $CPUTAPID
  29. } else {
  30. set _CPUTAPID 0x07926121
  31. }
  32. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  33. # Create the GDB Target.
  34. set _TARGETNAME $_CHIPNAME.cpu
  35. target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
  36. # REVISIT what operating environment sets up this virtual address mapping?
  37. $_TARGETNAME configure -work-area-virt 0xffff4c00 -work-area-phys 0xffff4c00 \
  38. -work-area-size 0x8000 -work-area-backup 1
  39. # Internal to the chip, there is 45K of SRAM
  40. #
  41. arm7_9 dcc_downloads enable
  42. # trace setup
  43. etm config $_TARGETNAME 16 normal full etb
  44. etb config $_TARGETNAME $_CHIPNAME.etb