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- # script for stm32f0x family
-
- #
- # stm32 devices support SWD transports only.
- #
- source [find target/swj-dp.tcl]
-
- if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
- } else {
- set _CHIPNAME stm32f0x
- }
-
- set _ENDIAN little
-
- # Work-area is a space in RAM used for flash programming
- # By default use 4kB
- if { [info exists WORKAREASIZE] } {
- set _WORKAREASIZE $WORKAREASIZE
- } else {
- set _WORKAREASIZE 0x1000
- }
-
- #jtag scan chain
- if { [info exists CPUTAPID] } {
- set _CPUTAPID $CPUTAPID
- } else {
- # See STM Document RM0091
- # Section 29.5.3
- set _CPUTAPID 0x0bb11477
- }
-
- swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
- set _TARGETNAME $_CHIPNAME.cpu
- target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
-
- $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
-
- # flash size will be probed
- set _FLASHNAME $_CHIPNAME.flash
- flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
-
- # adapter speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
- adapter_khz 1000
-
- adapter_nsrst_delay 100
-
- reset_config srst_nogate
-
- if {![using_hla]} {
- # if srst is not fitted use SYSRESETREQ to
- # perform a soft reset
- cortex_m reset_config sysresetreq
- }
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