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48 lines
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  1. #STR730 CPU
  2. jtag_khz 3000
  3. if { [info exists CHIPNAME] } {
  4. set _CHIPNAME $CHIPNAME
  5. } else {
  6. set _CHIPNAME str730
  7. }
  8. if { [info exists ENDIAN] } {
  9. set _ENDIAN $ENDIAN
  10. } else {
  11. set _ENDIAN little
  12. }
  13. if { [info exists CPUTAPID] } {
  14. set _CPUTAPID $CPUTAPID
  15. } else {
  16. set _CPUTAPID 0x3f0f0f0f
  17. }
  18. #use combined on interfaces or targets that can't set TRST/SRST separately
  19. #reset_config trst_and_srst srst_pulls_trst
  20. reset_config trst_and_srst srst_pulls_trst
  21. #jtag scan chain
  22. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
  23. #jtag nTRST and nSRST delay
  24. jtag_nsrst_delay 500
  25. jtag_ntrst_delay 500
  26. set _TARGETNAME $_CHIPNAME.cpu
  27. target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
  28. $_TARGETNAME configure -event reset-start { jtag_khz 10 }
  29. $_TARGETNAME configure -event reset-init { jtag_khz 3000 }
  30. $_TARGETNAME configure -event gdb-flash-erase-start {
  31. flash protect 0 0 7 off
  32. }
  33. $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
  34. #flash bank <driver> <base> <size> <chip_width> <bus_width>
  35. flash bank str7x 0x20000000 0x00040000 0 0 0 STR3x