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58 lines
1.2 KiB

  1. #
  2. # TI Calypso (lite) G2 C035 Digital Base Band chip
  3. #
  4. # ARM7TDMIE + DSP subchip (S28C128)
  5. #
  6. # 512K SRAM Calypso
  7. # 256K SRAM Calypso lite
  8. #
  9. if { [info exists CHIPNAME] } {
  10. set _CHIPNAME $CHIPNAME
  11. } else {
  12. set _CHIPNAME calypso
  13. }
  14. if { [info exists ENDIAN] } {
  15. set _ENDIAN $ENDIAN
  16. } else {
  17. set _ENDIAN little
  18. }
  19. if { [info exists CPUTAPID] } {
  20. set _CPUTAPID $CPUTAPID
  21. } else {
  22. set _CPUTAPID 0x3100e02f
  23. }
  24. # Work-area is a space in RAM used for flash programming
  25. # By default use 64kB
  26. if { [info exists WORKAREASIZE] } {
  27. set _WORKAREASIZE $WORKAREASIZE
  28. } else {
  29. set _WORKAREASIZE 0x10000
  30. }
  31. adapter_khz 1000
  32. reset_config trst_and_srst
  33. jtag newtap $_CHIPNAME dsp -expected-id 0x00000000 -irlen 8
  34. jtag newtap $_CHIPNAME arm -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  35. # target
  36. set _TARGETNAME $_CHIPNAME.arm
  37. target create $_TARGETNAME arm7tdmi -endian little -chain-position $_TARGETNAME -variant calypso
  38. # workarea
  39. $_TARGETNAME configure -work-area-phys 0x00800000 -work-area-size $_WORKAREASIZE -work-area-backup 1
  40. arm7_9 dcc_downloads enable
  41. arm7_9 fast_memory_access enable
  42. $_TARGETNAME configure -event examine-start {
  43. irscan calypso.arm 0x0b -endstate DRPAUSE
  44. drscan calypso.arm 2 2 -endstate RUN/IDLE
  45. }