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  1. /** @page targetnotarm OpenOCD Non-ARM Targets
  2. This page describes outstanding issues w.r.t. non-ARM targets.
  3. @section targetnotarmflash Flash drivers
  4. The flash drivers contain ARM32 code that is used
  5. to execute code on the target.
  6. This needs to be handled in some CPU independent
  7. manner.
  8. The ocl and ecos flash drivers compile the flash
  9. driver code to run on the target on the developer
  10. machine.
  11. The ocl and ecos flash drivers should be unified
  12. and instructions should be written on how to
  13. compile the target flash drivers. Perhaps
  14. using automake?
  15. eCos has CFI driver that could probably be compiled
  16. for all targets. The trick is to figure out a
  17. way to make the compiled flash drivers work
  18. on all target memory maps + sort out all the
  19. little details
  20. @section targetnotarm32v64 32 vs. 64 bit
  21. Currently OpenOCD only supports 32 bit targets.
  22. Adding 64 bit support would be nice but there
  23. hasn't been any call for it in the openocd development
  24. mailing list
  25. @section targetnotarmsupport Target Support
  26. target.h is relatively CPU agnostic and
  27. the intention is to move in the direction of less
  28. instruction set specific.
  29. Non-CPU targets are also supported, but there isn't
  30. a lot of activity on it in the mailing list currently.
  31. An example is FPGA programming support via JTAG,
  32. but also flash chips can be programmed directly
  33. using JTAG.
  34. @section targetnotarmphy non-JTAG physical layer
  35. JTAG is not the only physical protocol used to talk to
  36. CPUs.
  37. OpenOCD does not today have targets that use non-JTAG.
  38. The actual physical layer is a relatively modest part
  39. of the total OpenOCD system.
  40. @section targetnotarmppc PowerPC
  41. there exists open source implementations of powerpc
  42. target manipulation, but there hasn't been a lot
  43. of activity in the mailing list.
  44. @section targetnotarmmips MIPS
  45. Currently OpenOCD has a MIPS target defined. This is the
  46. first non-ARM example of a CPU target
  47. */