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  1. if { [info exists CHIPNAME] } {
  2. set _CHIPNAME $CHIPNAME
  3. } else {
  4. set _CHIPNAME aduc702x
  5. }
  6. if { [info exists ENDIAN] } {
  7. set _ENDIAN $ENDIAN
  8. } else {
  9. # This config file was defaulting to big endian..
  10. set _ENDIAN little
  11. }
  12. if { [info exists CPUTAPID] } {
  13. set _CPUTAPID $CPUTAPID
  14. } else {
  15. set _CPUTAPID 0x3f0f0f0f
  16. }
  17. adapter_nsrst_delay 200
  18. jtag_ntrst_delay 200
  19. ## JTAG scan chain
  20. #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
  21. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
  22. ##
  23. ## Target configuration
  24. ##
  25. set _TARGETNAME $_CHIPNAME.cpu
  26. target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME
  27. # allocate the entire SRAM as working area
  28. $_TARGETNAME configure -work-area-phys 0x10000 -work-area-size 0x2000
  29. ## flash configuration
  30. # only target number is needed
  31. set _FLASHNAME $_CHIPNAME.flash
  32. flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
  33. ## If you use the watchdog, the following code makes sure that the board
  34. ## doesn't reboot when halted via JTAG. Yes, on the older generation
  35. ## AdUC702x, timer3 continues running even when the CPU is halted.
  36. proc watchdog_service {} {
  37. global watchdog_hdl
  38. mww 0xffff036c 0
  39. # echo "watchdog!!"
  40. set watchdog_hdl [after 500 watchdog_service]
  41. }
  42. $_TARGETNAME configure -event reset-halt-post { watchdog_service }
  43. $_TARGETNAME configure -event resume-start { global watchdog_hdl; after cancel $watchdog_hdl }