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  1. <html>
  2. <head>
  3. <title>Test results for revision 1.62</title>
  4. </head>
  5. <body>
  6. <H1>SAM7</H1>
  7. <H2>Connectivity</H2>
  8. <table border=1>
  9. <tr>
  10. <td>ID</td>
  11. <td>Target</td>
  12. <td>Interface</td>
  13. <td>Description</td>
  14. <td>Initial state</td>
  15. <td>Input</td>
  16. <td>Expected output</td>
  17. <td>Actual output</td>
  18. <td>Pass/Fail</td>
  19. </tr>
  20. <tr>
  21. <td><a name="CON001"/>CON001</td>
  22. <td>AT91FR40162</td>
  23. <td>ZY1000</td>
  24. <td>Telnet connection</td>
  25. <td>Power on, jtag target attached</td>
  26. <td>On console, type<br><code>telnet ip port</code></td>
  27. <td><code>Open On-Chip Debugger<br>></code></td>
  28. <td><code>Open On-Chip Debugger<br>></code></td>
  29. <td>PASS</td>
  30. </tr>
  31. <tr>
  32. <td><a name="CON002"/>CON002</td>
  33. <td>AT91FR40162</td>
  34. <td>ZY1000</td>
  35. <td>GDB server connection</td>
  36. <td>Power on, jtag target attached</td>
  37. <td>On GDB console, type<br><code>target remote ip:port</code></td>
  38. <td><code>Remote debugging using 10.0.0.73:3333</code></td>
  39. <td><code>
  40. (gdb) tar remo 10.0.0.138:3333<br>
  41. Remote debugging using 10.0.0.138:3333<br>
  42. 0x000155b8 in ?? ()<br>
  43. </code></td>
  44. <td>PASS</td>
  45. </tr>
  46. </table>
  47. <H2>Reset</H2>
  48. <table border=1>
  49. <tr>
  50. <td>ID</td>
  51. <td>Target</td>
  52. <td>Interface</td>
  53. <td>Description</td>
  54. <td>Initial state</td>
  55. <td>Input</td>
  56. <td>Expected output</td>
  57. <td>Actual output</td>
  58. <td>Pass/Fail</td>
  59. </tr>
  60. <tr>
  61. <td><a name="RES001"/>RES001</td>
  62. <td>AT91FR40162</td>
  63. <td>ZY1000</td>
  64. <td>Reset halt on a blank target</td>
  65. <td>Erase all the content of the flash</td>
  66. <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
  67. <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
  68. <td>
  69. <code>
  70. > mdw 0x01000000 32<br>
  71. 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  72. 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  73. 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  74. 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  75. > reset halt<br>
  76. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  77. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  78. target state: halted<br>
  79. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  80. cpsr: 0x600000d3 pc: 0x00008a70<br>
  81. > <br>
  82. </code>
  83. </td>
  84. <td>PASS</td>
  85. </tr>
  86. <tr>
  87. <td><a name="RES002"/>RES002</td>
  88. <td>AT91FR40162</td>
  89. <td>ZY1000</td>
  90. <td>Reset init on a blank target</td>
  91. <td>Erase all the content of the flash</td>
  92. <td>Connect via the telnet interface and type <br><code>reset init</code></td>
  93. <td>Reset should return without error and the output should contain <br><code>executing reset script 'name_of_the_script'</code></td>
  94. <td>
  95. <code>
  96. > reset init<br>
  97. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  98. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  99. target state: halted<br>
  100. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  101. cpsr: 0x600000d3 pc: 0x00008ea4<br>
  102. > <br>
  103. </code>
  104. </td>
  105. <td>PASS<br>
  106. NOTE! Even if there is no message, the reset script is being executed (proved by side effects)</td>
  107. </tr>
  108. <tr>
  109. <td><a name="RES003"/>RES003</td>
  110. <td>AT91FR40162</td>
  111. <td>ZY1000</td>
  112. <td>Reset after a power cycle of the target</td>
  113. <td>Reset the target then power cycle the target</td>
  114. <td>Connect via the telnet interface and type <br><code>reset halt</code> after the power was detected</td>
  115. <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
  116. <td>
  117. <code>
  118. Sensed nSRST asserted<br>
  119. Sensed power dropout.<br>
  120. target state: halted<br>
  121. target halted in ARM state due to debug request, current mode: Supervisor<br>
  122. cpsr: 0xf00000d3 pc: 0xd5dff7e6<br>
  123. Sensed power restore.<br>
  124. Sensed nSRST deasserted<br>
  125. > reset halt<br>
  126. JTAG device found: 0x3f0f0f0f (Manufacturer: 0x787, Part: 0xf0f0, Version: 0x3)<br>
  127. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  128. target state: halted<br>
  129. target halted in ARM state due to debug request, current mode: Supervisor<br>
  130. cpsr: 0xf00000d3 pc: 0x0000072c<br>
  131. ><br>
  132. </code>
  133. </td>
  134. <td>PASS</td>
  135. </tr>
  136. <tr>
  137. <td><a name="RES004"/>RES004</td>
  138. <td>AT91FR40162</td>
  139. <td>ZY1000</td>
  140. <td>Reset halt on a blank target where reset halt is supported</td>
  141. <td>Erase all the content of the flash</td>
  142. <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
  143. <td>Reset should return without error and the output should contain<br><code>target state: halted<br>pc = 0</code></td>
  144. <td>
  145. > reset halt<br>
  146. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  147. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  148. target state: halted<br>
  149. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  150. cpsr: 0xf00000d3 pc: 0x00008b38<br>
  151. > <br>
  152. </td>
  153. <td>PASS</td>
  154. </tr>
  155. <tr>
  156. <td><a name="RES005"/>RES005</td>
  157. <td>AT91FR40162</td>
  158. <td>ZY1000</td>
  159. <td>Reset halt on a blank target using return clock</td>
  160. <td>Erase all the content of the flash, set the configuration script to use RCLK</td>
  161. <td>Connect via the telnet interface and type <br><code>reset halt</code></td>
  162. <td>Reset should return without error and the output should contain<br><code>target state: halted</code></td>
  163. <td>
  164. <code>
  165. N/A, At91EB40A does <bold>NOT</bold> have support for RCLK
  166. </code>
  167. </td>
  168. <td>N/A</td>
  169. </tr>
  170. </table>
  171. <H2>JTAG Speed</H2>
  172. <table border=1>
  173. <tr>
  174. <td>ID</td>
  175. <td>Target</td>
  176. <td>ZY1000</td>
  177. <td>Description</td>
  178. <td>Initial state</td>
  179. <td>Input</td>
  180. <td>Expected output</td>
  181. <td>Actual output</td>
  182. <td>Pass/Fail</td>
  183. </tr>
  184. <tr>
  185. <td><a name="SPD001"/>SPD001</td>
  186. <td>AT91FR40162</td>
  187. <td>ZY1000</td>
  188. <td>16MHz on normal operation</td>
  189. <td>Reset init the target according to RES002 </td>
  190. <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
  191. <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
  192. <td>
  193. <code>
  194. > reset halt<br>
  195. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  196. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  197. target state: halted<br>
  198. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  199. cpsr: 0xf00000d3 pc: 0x00008ae8<br>
  200. > jtag_khz 16000 <br>
  201. jtag_speed 4 => JTAG clk=16.000000<br>
  202. 16000 kHz<br>
  203. > mdw 0 32 <br>
  204. 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  205. 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  206. 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  207. 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  208. </code>
  209. </td>
  210. <td>PASS</td>
  211. </tr>
  212. <tr>
  213. <td><a name="SPD002"/>SPD002</td>
  214. <td>AT91FR40162</td>
  215. <td>ZY1000</td>
  216. <td>8MHz on normal operation</td>
  217. <td>Reset init the target according to RES002 </td>
  218. <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
  219. <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
  220. <td>
  221. <code>
  222. > reset halt <br>
  223. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  224. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  225. target state: halted<br>
  226. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  227. cpsr: 0xf00000d3 pc: 0x00008c14<br>
  228. > jtag_khz 8000 <br>
  229. jtag_speed 8 => JTAG clk=8.000000<br>
  230. 8000 kHz<br>
  231. > mdw 0 32 <br>
  232. 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  233. 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  234. 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  235. 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  236. > <br>
  237. </code>
  238. </td>
  239. <td>PASS</td>
  240. </tr>
  241. <tr>
  242. <td><a name="SPD003"/>SPD003</td>
  243. <td>AT91FR40162</td>
  244. <td>ZY1000</td>
  245. <td>4MHz on normal operation</td>
  246. <td>Reset init the target according to RES002 </td>
  247. <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
  248. <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
  249. <td>
  250. <code>
  251. > reset halt <br>
  252. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  253. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  254. target state: halted<br>
  255. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  256. cpsr: 0xf00000d3 pc: 0x00008bc4<br>
  257. > jtag_khz 4000<br>
  258. jtag_speed 16 => JTAG clk=4.000000<br>
  259. 4000 kHz<br>
  260. > mdw 0 32 <br>
  261. 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  262. 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  263. 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  264. 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  265. > <br>
  266. </code>
  267. </td>
  268. <td>PASS</td>
  269. </tr>
  270. <tr>
  271. <td><a name="SPD004"/>SPD004</td>
  272. <td>AT91FR40162</td>
  273. <td>ZY1000</td>
  274. <td>2MHz on normal operation</td>
  275. <td>Reset init the target according to RES002 </td>
  276. <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
  277. <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
  278. <td>
  279. <code>
  280. > reset halt<br>
  281. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  282. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  283. target state: halted<br>
  284. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  285. cpsr: 0xf00000d3 pc: 0x00009678<br>
  286. > jtag_khz 2000<br>
  287. jtag_speed 32 => JTAG clk=2.000000<br>
  288. 2000 kHz<br>
  289. > mdw 0 32 <br>
  290. 0x00000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  291. 0x00000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  292. 0x00000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  293. 0x00000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  294. > <br>
  295. </code>
  296. </td>
  297. <td>PASS</td>
  298. </tr>
  299. <tr>
  300. <td><a name="SPD005"/>SPD005</td>
  301. <td>AT91FR40162</td>
  302. <td>ZY1000</td>
  303. <td>RCLK on normal operation</td>
  304. <td>Reset init the target according to RES002 </td>
  305. <td>Change speed and exercise a memory access over the JTAG, for example <br><code>mdw 0x0 32</code></td>
  306. <td>The command should run without any errors. If any JTAG checking errors happen, the test failed</td>
  307. <td>
  308. <code>
  309. > jtag_khz 0<br>
  310. RCLK - adaptive<br>
  311. RCLK timeout<br>
  312. </code>
  313. N/A for this target
  314. </td>
  315. <td>N/A for this target</td>
  316. </tr>
  317. </table>
  318. <H2>Debugging</H2>
  319. <table border=1>
  320. <tr>
  321. <td>ID</td>
  322. <td>Target</td>
  323. <td>Interface</td>
  324. <td>Description</td>
  325. <td>Initial state</td>
  326. <td>Input</td>
  327. <td>Expected output</td>
  328. <td>Actual output</td>
  329. <td>Pass/Fail</td>
  330. </tr>
  331. <tr>
  332. <td><a name="DBG001"/>DBG001</td>
  333. <td>AT91FR40162</td>
  334. <td>ZY1000</td>
  335. <td>Load is working</td>
  336. <td>Reset init is working, RAM is accesible, GDB server is started</td>
  337. <td>On the console of the OS: <br>
  338. <code>$ arm-none-eabi-gdb redboot_ram.elf</code><br>
  339. <code>(gdb) target remote ip:port</code><br>
  340. <code>(gdb) load</load>
  341. </td>
  342. <td>Load should return without error, typical output looks like:<br>
  343. <code>
  344. Loading section .text, size 0x14c lma 0x0<br>
  345. Start address 0x40, load size 332<br>
  346. Transfer rate: 180 bytes/sec, 332 bytes/write.<br>
  347. </code>
  348. </td>
  349. <td><code>
  350. (gdb) load<br>
  351. Loading section .rom_vectors, size 0x40 lma 0xc000<br>
  352. Loading section .text, size 0x103e8 lma 0xc040<br>
  353. Loading section .rodata, size 0x1a84 lma 0x1c428<br>
  354. Loading section .data, size 0x3ec lma 0x1deac<br>
  355. Start address 0xc040, load size 74392<br>
  356. Transfer rate: 572 KB/sec, 9299 bytes/write.<br>
  357. (gdb)
  358. </code></td>
  359. <td>PASS</td>
  360. </tr>
  361. <tr>
  362. <td><a name="DBG002"/>DBG002</td>
  363. <td>AT91FR40162</td>
  364. <td>ZY1000</td>
  365. <td>Software breakpoint</td>
  366. <td>Load the redboot_ram.elf application, use instructions from GDB001</td>
  367. <td>In the GDB console:<br>
  368. <code>
  369. (gdb) monitor arm7_9 dbgrq enable<br>
  370. software breakpoints enabled<br>
  371. (gdb) break cyg_start<br>
  372. Breakpoint 1 at 0xec: file src/main.c, line 71.<br>
  373. (gdb) continue<br>
  374. Continuing.
  375. </code>
  376. </td>
  377. <td>The software breakpoint should be reached, a typical output looks like:<br>
  378. <code>
  379. Breakpoint 1, main () at src/main.c:69<br>
  380. 69 DWORD a = 1;<br>
  381. </code>
  382. </td>
  383. <td>
  384. <code>
  385. (gdb) monitor arm7_9 dbgrq enable<br>
  386. use of EmbeddedICE dbgrq instead of breakpoint for target halt enabled<br>
  387. (gdb) break cyg_start<br>
  388. <br>
  389. Breakpoint 1 at 0x155b8: file /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c, line 264.<br>
  390. (gdb) continue<br>
  391. Continuing.<br>
  392. <br>
  393. Breakpoint 1, cyg_start ()<br>
  394. at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
  395. 264 CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
  396. (gdb) <br>
  397. </code>
  398. </td>
  399. <td>PASS</td>
  400. </tr>
  401. <tr>
  402. <td><a name="DBG003"/>DBG003</td>
  403. <td>AT91FR40162</td>
  404. <td>ZY1000</td>
  405. <td>Single step in a RAM application</td>
  406. <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
  407. <td>In GDB, type <br><code>(gdb) step</code></td>
  408. <td>The next instruction should be reached, typical output:<br>
  409. <code>
  410. (gdb) step<br>
  411. 70 DWORD b = 2;
  412. </code>
  413. </td>
  414. <td>
  415. <code>
  416. (gdb) step<br>
  417. 266 CYGACC_CALL_IF_MONITOR_RETURN_SET(return_to_redboot);<br>
  418. (gdb)<br>
  419. </code>
  420. </td>
  421. <td>PASS</td>
  422. </tr>
  423. <tr>
  424. <td><a name="DBG004"/>DBG004</td>
  425. <td>AT91FR40162</td>
  426. <td>ZY1000</td>
  427. <td>Software break points are working after a reset</td>
  428. <td>Load the test_ram.elf application, use instructions from GDB001, break in main using the instructions from GDB002</td>
  429. <td>In GDB, type <br><code>
  430. (gdb) monitor reset init<br>
  431. (gdb) load<br>
  432. (gdb) continue<br>
  433. </code></td>
  434. <td>The breakpoint should be reached, typical output:<br>
  435. <code>
  436. Breakpoint 1, main () at src/main.c:69<br>
  437. 69 DWORD a = 1;
  438. </code>
  439. </td>
  440. <td><code>
  441. (gdb) moni reset init<br>
  442. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  443. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  444. target state: halted<br>
  445. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  446. cpsr: 0x600000d3 pc: 0x00008ae8<br>
  447. (gdb) load<br>
  448. Loading section .rom_vectors, size 0x40 lma 0xc000<br>
  449. Loading section .text, size 0x103e8 lma 0xc040<br>
  450. Loading section .rodata, size 0x1a84 lma 0x1c428<br>
  451. Loading section .data, size 0x3ec lma 0x1deac<br>
  452. Start address 0xc040, load size 74392<br>
  453. Transfer rate: 576 KB/sec, 9299 bytes/write.<br>
  454. (gdb) c<br>
  455. Continuing.<br>
  456. <br>
  457. Breakpoint 1, cyg_start ()<br>
  458. at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
  459. 264 CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
  460. (gdb) <br>
  461. </code></td>
  462. <td>PASS</td>
  463. </tr>
  464. <tr>
  465. <td><a name="DBG005"/>DBG005</td>
  466. <td>AT91FR40162</td>
  467. <td>ZY1000</td>
  468. <td>Hardware breakpoint</td>
  469. <td>Flash the redboot_rom.elf application. Make this test after FLA004 has passed</td>
  470. <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
  471. <code>
  472. (gdb) monitor reset init<br>
  473. (gdb) load<br>
  474. Loading section .text, size 0x194 lma 0x100000<br>
  475. Start address 0x100040, load size 404<br>
  476. Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
  477. (gdb) monitor arm7_9 force_hw_bkpts enable<br>
  478. force hardware breakpoints enabled<br>
  479. (gdb) break main<br>
  480. Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
  481. (gdb) continue<br>
  482. </code>
  483. </td>
  484. <td>The breakpoint should be reached, typical output:<br>
  485. <code>
  486. Continuing.<br>
  487. <br>
  488. Breakpoint 1, main () at src/main.c:69<br>
  489. 69 DWORD a = 1;<br>
  490. </code>
  491. </td>
  492. <td>
  493. <code>
  494. (gdb) load<br>
  495. Loading section .rom_vectors, size 0x40 lma 0x1000000<br>
  496. Loading section .text, size 0x10638 lma 0x1000040<br>
  497. Loading section .rodata, size 0x1a84 lma 0x1010678<br>
  498. Loading section .data, size 0x428 lma 0x10120fc<br>
  499. Start address 0x1000040, load size 75044<br>
  500. Transfer rate: 33 KB/sec, 9380 bytes/write.<br>
  501. (gdb) break cyg_start<br>
  502. Breakpoint 1 at 0x100979c: file /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c, line 264.<br>
  503. (gdb) c<br>
  504. Continuing.<br>
  505. Note: automatically using hardware breakpoints for read-only addresses.<br>
  506. <br>
  507. Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
  508. 264 CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
  509. (gdb) <br>
  510. </code>
  511. </td>
  512. <td>PASS</td>
  513. </tr>
  514. <tr>
  515. <td><a name="DBG006"/>DBG006</td>
  516. <td>AT91FR40162</td>
  517. <td>ZY1000</td>
  518. <td>Hardware breakpoint is set after a reset</td>
  519. <td>Follow the instructions to flash and insert a hardware breakpoint from DBG005</td>
  520. <td>In GDB, type <br>
  521. <code>
  522. (gdb) monitor reset<br>
  523. (gdb) monitor reg pc 0x100000<br>
  524. pc (/32): 0x00100000<br>
  525. (gdb) continue
  526. </code><br>
  527. where the value inserted in PC is the start address of the application
  528. </td>
  529. <td>The breakpoint should be reached, typical output:<br>
  530. <code>
  531. Continuing.<br>
  532. <br>
  533. Breakpoint 1, main () at src/main.c:69<br>
  534. 69 DWORD a = 1;<br>
  535. </code>
  536. </td>
  537. <td>
  538. <code>
  539. (gdb) moni reset init<br>
  540. JTAG tap: zy1000.cpu tap/device found: 0x1f0f0f0f (mfg: 0x787, part: 0xf0f0, ver: 0x1)<br>
  541. srst pulls trst - can not reset into halted mode. Issuing halt after reset.<br>
  542. target state: halted<br>
  543. target halted in ARM state due to debug-request, current mode: Supervisor<br>
  544. cpsr: 0x200000d3 pc: 0x01000200<br>
  545. (gdb) moni reg pc 0x1000000<br>
  546. pc (/32): 0x01000000<br>
  547. (gdb) c<br>
  548. Continuing.<br>
  549. <br>
  550. Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
  551. 264 CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
  552. (gdb) <br>
  553. </code>
  554. </td>
  555. <td>PASS</td>
  556. </tr>
  557. <tr>
  558. <td><a name="DBG007"/>DBG007</td>
  559. <td>AT91FR40162</td>
  560. <td>ZY1000</td>
  561. <td>Single step in ROM</td>
  562. <td>Flash the test_rom.elf application and set a breakpoint in main, use DBG005. Make this test after FLA004 has passed</td>
  563. <td>Be sure that <code>gdb_memory_map</code> and <code>gdb_flash_program</code> are enabled. In GDB, type <br>
  564. <code>
  565. (gdb) monitor reset<br>
  566. (gdb) load<br>
  567. Loading section .text, size 0x194 lma 0x100000<br>
  568. Start address 0x100040, load size 404<br>
  569. Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
  570. (gdb) monitor arm7_9 force_hw_bkpts enable<br>
  571. force hardware breakpoints enabled<br>
  572. (gdb) break main<br>
  573. Breakpoint 1 at 0x100134: file src/main.c, line 69.<br>
  574. (gdb) continue<br>
  575. Continuing.<br>
  576. <br>
  577. Breakpoint 1, main () at src/main.c:69<br>
  578. 69 DWORD a = 1;<br>
  579. (gdb) step
  580. </code>
  581. </td>
  582. <td>The breakpoint should be reached, typical output:<br>
  583. <code>
  584. target state: halted<br>
  585. target halted in ARM state due to single step, current mode: Supervisor<br>
  586. cpsr: 0x60000013 pc: 0x0010013c<br>
  587. 70 DWORD b = 2;<br>
  588. </code>
  589. </td>
  590. <td><code>
  591. Breakpoint 1, cyg_start () at /home/edgar/temp/ecosboard/packages/redboot/current/src/main.c:264<br>
  592. 264 CYGACC_CALL_IF_MONITOR_VERSION_SET(RedBoot_version);<br>
  593. (gdb) step<br>
  594. 266 CYGACC_CALL_IF_MONITOR_RETURN_SET(return_to_redboot);<br>
  595. </code></td>
  596. <td>PASS</td>
  597. </tr>
  598. </table>
  599. <H2>RAM access</H2>
  600. Note: these tests are not designed to test/debug the target, but to test functionalities!
  601. <table border=1>
  602. <tr>
  603. <td>ID</td>
  604. <td>Target</td>
  605. <td>Interface</td>
  606. <td>Description</td>
  607. <td>Initial state</td>
  608. <td>Input</td>
  609. <td>Expected output</td>
  610. <td>Actual output</td>
  611. <td>Pass/Fail</td>
  612. </tr>
  613. <tr>
  614. <td><a name="RAM001"/>RAM001</td>
  615. <td>AT91FR40162</td>
  616. <td>ZY1000</td>
  617. <td>32 bit Write/read RAM</td>
  618. <td>Reset init is working</td>
  619. <td>On the telnet interface<br>
  620. <code> > mww ram_address 0xdeadbeef 16<br>
  621. > mdw ram_address 32
  622. </code>
  623. </td>
  624. <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 32bit long containing 0xdeadbeef.<br>
  625. <code>
  626. > mww 0x0 0xdeadbeef 16<br>
  627. > mdw 0x0 32<br>
  628. 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  629. 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  630. 0x00000040: e1a00000 e59fa51c e59f051c e04aa000 00080017 00009388 00009388 00009388<br>
  631. 0x00000060: 00009388 0002c2c0 0002c2c0 000094f8 000094f4 00009388 00009388 00009388<br>
  632. </code>
  633. </td>
  634. <td><code>
  635. > mww 0 0xdeadbeef 16<br>
  636. > mdw 0x0 32 <br>
  637. 0x00000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  638. 0x00000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef <br>
  639. 0x00000040: 15aadc6d 425b6f33 e789f955 d390dcc2 00080017 010067b4 010067b4 010067b4 <br>
  640. 0x00000060: 010067b4 00006e74 00006e74 010067b4 010067b4 010067b4 010067b4 010067b4 <br>
  641. </code></td>
  642. <td>PASS</td>
  643. </tr>
  644. <tr>
  645. <td><a name="RAM002"/>RAM002</td>
  646. <td>AT91FR40162</td>
  647. <td>ZY1000</td>
  648. <td>16 bit Write/read RAM</td>
  649. <td>Reset init is working</td>
  650. <td>On the telnet interface<br>
  651. <code> > mwh ram_address 0xbeef 16<br>
  652. > mdh ram_address 32
  653. </code>
  654. </td>
  655. <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 16bit long containing 0xbeef.<br>
  656. <code>
  657. > mwh 0x0 0xbeef 16<br>
  658. > mdh 0x0 32<br>
  659. 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
  660. 0x00000020: 00e0 0000 021c 0000 0240 0000 026c 0000 0288 0000 0000 0000 0388 0000 0350 0000<br>
  661. >
  662. </code>
  663. </td>
  664. <td><code>
  665. > mwh 0 0xbeef 16<br>
  666. > mdh 0x0 32<br>
  667. 0x00000000: beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef beef<br>
  668. 0x00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 <br>
  669. </code></td>
  670. <td>PASS<br>There is a problem with the formatting of the output</td>
  671. </tr>
  672. <tr>
  673. <td><a name="RAM003"/>RAM003</td>
  674. <td>AT91FR40162</td>
  675. <td>ZY1000</td>
  676. <td>8 bit Write/read RAM</td>
  677. <td>Reset init is working</td>
  678. <td>On the telnet interface<br>
  679. <code> > mwb ram_address 0xab 16<br>
  680. > mdb ram_address 32
  681. </code>
  682. </td>
  683. <td>The commands should execute without error. A clear failure is a memory access exception. The result of running the commands should be a list of 16 locations 8bit long containing 0xab.<br>
  684. <code>
  685. > mwb ram_address 0xab 16<br>
  686. > mdb ram_address 32<br>
  687. 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
  688. >
  689. </code>
  690. </td>
  691. <td><code>
  692. > mwb 0x0 0xab 16<br>
  693. > mdb 0x0 32 <br>
  694. 0x00000000: ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab ab 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00<br>
  695. </code></td>
  696. <td>PASS</td>
  697. </tr>
  698. </table>
  699. <H2>Flash access</H2>
  700. <table border=1>
  701. <tr>
  702. <td>ID</td>
  703. <td>Target</td>
  704. <td>Interface</td>
  705. <td>Description</td>
  706. <td>Initial state</td>
  707. <td>Input</td>
  708. <td>Expected output</td>
  709. <td>Actual output</td>
  710. <td>Pass/Fail</td>
  711. </tr>
  712. <tr>
  713. <td><a name="FLA001"/>FLA001</td>
  714. <td>AT91FR40162</td>
  715. <td>ZY1000</td>
  716. <td>Flash probe</td>
  717. <td>Reset init is working</td>
  718. <td>On the telnet interface:<br>
  719. <code> > flash probe 0</code>
  720. </td>
  721. <td>The command should execute without error. The output should state the name of the flash and the starting address. An example of output:<br>
  722. <code>flash 'ecosflash' found at 0x01000000</code>
  723. </td>
  724. <td>
  725. <code>
  726. > flash probe 0
  727. flash 'ecosflash' found at 0x01000000
  728. </code>
  729. </td>
  730. <td>PASS</td>
  731. </tr>
  732. <tr>
  733. <td><a name="FLA002"/>FLA002</td>
  734. <td>AT91FR40162</td>
  735. <td>ZY1000</td>
  736. <td>flash fillw</td>
  737. <td>Reset init is working, flash is probed</td>
  738. <td>On the telnet interface<br>
  739. <code> > flash fillw 0x100000 0xdeadbeef 16
  740. </code>
  741. </td>
  742. <td>The commands should execute without error. The output looks like:<br>
  743. <code>
  744. wrote 64 bytes to 0x0100000 in 11.610000s (0.091516 kb/s)
  745. </code><br>
  746. To verify the contents of the flash:<br>
  747. <code>
  748. > mdw 0x100000 32<br>
  749. 0x0100000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  750. 0x0100020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  751. 0x0100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  752. 0x0100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
  753. </code>
  754. </td>
  755. <td><code>
  756. > flash fillw 0x01000000 0xdeadbeef 16 <br>
  757. wrote 64 bytes to 0x01000000 in 0.010000s (6.250 kb/s)<br>
  758. > mdw 0x1000000 32<br>
  759. 0x01000000: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef<br>
  760. 0x01000020: deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef deadbeef <br>
  761. 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  762. 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  763. >
  764. </code></td>
  765. <td>PASS</td>
  766. </tr>
  767. <tr>
  768. <td><a name="FLA003"/>FLA003</td>
  769. <td>AT91FR40162</td>
  770. <td>ZY1000</td>
  771. <td>Flash erase</td>
  772. <td>Reset init is working, flash is probed</td>
  773. <td>On the telnet interface<br>
  774. <code> > flash erase_address 0x100000 0x2000
  775. </code>
  776. </td>
  777. <td>The commands should execute without error.<br>
  778. <code>
  779. erased address 0x0100000 length 8192 in 4.970000s
  780. </code>
  781. To check that the flash has been erased, read at different addresses. The result should always be 0xff.
  782. <code>
  783. > mdw 0x100000 32<br>
  784. 0x0100000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  785. 0x0100020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  786. 0x0100040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  787. 0x0100060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff
  788. </code>
  789. </td>
  790. <td><code>
  791. > flash erase_address 0x1000000 0x10000<br>
  792. erased address 0x01000000 (length 65536) in 0.840000s (76.190 kb/s)<br>
  793. > mdw 0x1000000 32 <br>
  794. 0x01000000: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff<br>
  795. 0x01000020: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  796. 0x01000040: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  797. 0x01000060: ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff ffffffff <br>
  798. </code></td>
  799. <td>PASS</td>
  800. </tr>
  801. <tr>
  802. <td><a name="FLA004"/>FLA004</td>
  803. <td>AT91FR40162</td>
  804. <td>ZY1000</td>
  805. <td>Loading to flash from GDB</td>
  806. <td>Reset init is working, flash is probed, connectivity to GDB server is working</td>
  807. <td>Start GDB using a ROM elf image, eg: arm-elf-gdb test_rom.elf. <br>
  808. <code>
  809. (gdb) target remote ip:port<br>
  810. (gdb) monitor reset halt<br>
  811. (gdb) load<br>
  812. Loading section .text, size 0x194 lma 0x100000<br>
  813. Start address 0x100040, load size 404<br>
  814. Transfer rate: 179 bytes/sec, 404 bytes/write.<br>
  815. (gdb) monitor verify_image path_to_elf_file
  816. </code>
  817. </td>
  818. <td>The output should look like:<br>
  819. <code>
  820. verified 404 bytes in 5.060000s
  821. </code><br>
  822. The failure message is something like:<br>
  823. <code>Verify operation failed address 0x00200000. Was 0x00 instead of 0x18</code>
  824. </td>
  825. <td>
  826. <code>
  827. (gdb) load<br>
  828. Loading section .rom_vectors, size 0x40 lma 0x1000000<br>
  829. Loading section .text, size 0x10638 lma 0x1000040<br>
  830. Loading section .rodata, size 0x1a84 lma 0x1010678<br>
  831. Loading section .data, size 0x428 lma 0x10120fc<br>
  832. Start address 0x1000040, load size 75044<br>
  833. Transfer rate: 34 KB/sec, 9380 bytes/write.<br>
  834. (gdb) moni verify_image /tftp/10.0.0.190/redboot_rom.elf<br>
  835. keep_alive() was not invoked in the 1000ms timelimit. GDB alive packet not sent! (1820). Workaround: increase "set remotetimeout" in GDB<br>
  836. verified 75044 bytes in 1.960000s (37.390 kb/s)<br>
  837. </code>
  838. </td>
  839. <td>PASS</td>
  840. </tr>
  841. </table>
  842. </body>
  843. </html>