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  1. #start slow, speed up after reset
  2. jtag_khz 10
  3. if { [info exists CHIPNAME] } {
  4. set _CHIPNAME $CHIPNAME
  5. } else {
  6. set _CHIPNAME str710
  7. }
  8. if { [info exists ENDIAN] } {
  9. set _ENDIAN $ENDIAN
  10. } else {
  11. set _ENDIAN little
  12. }
  13. if { [info exists CPUTAPID] } {
  14. set _CPUTAPID $CPUTAPID
  15. } else {
  16. set _CPUTAPID 0x3f0f0f0f
  17. }
  18. #use combined on interfaces or targets that can't set TRST/SRST separately
  19. reset_config trst_and_srst srst_pulls_trst
  20. #jtag scan chain
  21. jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
  22. set _TARGETNAME $_CHIPNAME.cpu
  23. target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi
  24. $_TARGETNAME configure -event reset-start { jtag_khz 10 }
  25. $_TARGETNAME configure -event reset-init { jtag_khz 6000 }
  26. $_TARGETNAME configure -event gdb-flash-erase-start {
  27. flash protect 0 0 7 off
  28. flash protect 1 0 1 off
  29. }
  30. $_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x2000C000 -work-area-size 0x4000 -work-area-backup 0
  31. #flash bank str7x <base> <size> 0 0 <target#> <variant>
  32. flash bank str7x 0x40000000 0x00040000 0 0 0 STR71x
  33. flash bank str7x 0x400C0000 0x00004000 0 0 0 STR71x
  34. # For more information about the configuration files, take a look at:
  35. # openocd.texi