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137 lines
3.0 KiB

  1. echo Setting up for the FreeScale iMX31 Board.\n
  2. # SETUP GDB :
  3. #
  4. # Common gdb setup for ARM CPUs
  5. set complaints 1
  6. set output-radix 10
  7. set input-radix 10
  8. set prompt (arm-gdb)
  9. set endian little
  10. dir .
  11. # Tell GDB to use 1024 bytes packes when downloading, this
  12. # reduces load image download times
  13. set remote memory-write-packet-size 1024
  14. set remote memory-write-packet-size fixed
  15. # DEFINE MACROS :
  16. #
  17. # Create a "refresh" macro to update gdb's screens after the cpu
  18. # has been stopped by the other CPU or following an "monitor allstop"
  19. define refresh
  20. monitor set hbreak
  21. cont
  22. monitor clear hbreak
  23. end
  24. # CONNECT TO TARGET :
  25. target remote 127.0.0.1:3333
  26. monitor reset run
  27. monitor reset halt
  28. # iMX31 PDK board initialization commands:
  29. #// init_ccm
  30. monitor mww 0x53FC0000 0x040
  31. monitor mww 0x53F80000 0x074B0B7D
  32. #//532-133-66.5
  33. #//monitor mww 0x53F80004 0xFF871D58
  34. #//monitor mww 0x53F80010 0x0033280C
  35. #// 399MHz - 26MHz input, PD=1,MFI=7, MFN=27, MFD=40
  36. monitor mww 0x53F80004 0xFF871D50
  37. monitor mww 0x53F80010 0x00271C1B
  38. #// 208-104-52
  39. #//monitor mww 0x53F80004 0xFF871D48
  40. #//monitor mww 0x53F80010 0x04002000
  41. #// Configure CPLD on CS5
  42. monitor mww 0xb8002050 0x0000DCF6
  43. monitor mww 0xb8002054 0x444A4541
  44. monitor mww 0xb8002058 0x44443302
  45. #// Disable maximum drive strength for SDRAM/DDR lines by clearing DSE1 bits
  46. #// in SW_PAD_CTL registers
  47. #// SDCLK
  48. monitor mww 0x43FAC26C 0
  49. #// CAS
  50. monitor mww 0x43FAC270 0
  51. #// RAS
  52. monitor mww 0x43FAC274 0
  53. #// CS2 (CSD0)
  54. monitor mww 0x43FAC27C 0x1000
  55. #// DQM3
  56. monitor mww 0x43FAC284 0
  57. #// DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC)
  58. monitor mww 0x43FAC288 0
  59. monitor mww 0x43FAC28C 0
  60. monitor mww 0x43FAC290 0
  61. monitor mww 0x43FAC294 0
  62. monitor mww 0x43FAC298 0
  63. monitor mww 0x43FAC29C 0
  64. monitor mww 0x43FAC2A0 0
  65. monitor mww 0x43FAC2A4 0
  66. monitor mww 0x43FAC2A8 0
  67. monitor mww 0x43FAC2AC 0
  68. monitor mww 0x43FAC2B0 0
  69. monitor mww 0x43FAC2B4 0
  70. monitor mww 0x43FAC2B8 0
  71. monitor mww 0x43FAC2BC 0
  72. monitor mww 0x43FAC2C0 0
  73. monitor mww 0x43FAC2C4 0
  74. monitor mww 0x43FAC2C8 0
  75. monitor mww 0x43FAC2CC 0
  76. monitor mww 0x43FAC2D0 0
  77. monitor mww 0x43FAC2D4 0
  78. monitor mww 0x43FAC2D8 0
  79. monitor mww 0x43FAC2DC 0
  80. #// Initialization script for 32 bit DDR on MX31 PDK
  81. monitor mww 0xB8001010 0x00000004
  82. monitor mww 0xB8001004 0x006ac73a
  83. monitor mww 0xB8001000 0x92100000
  84. monitor mww 0x80000f00 0x12344321
  85. monitor mww 0xB8001000 0xa2100000
  86. monitor mww 0x80000000 0x12344321
  87. monitor mww 0x80000000 0x12344321
  88. monitor mww 0xB8001000 0xb2100000
  89. #monitor char 0x80000033 0xda
  90. monitor mwb 0x80000033 0xda
  91. #monitor char 0x81000000 0xff
  92. monitor mwb 0x81000000 0xff
  93. monitor mww 0xB8001000 0x82226080
  94. monitor mww 0x80000000 0xDEADBEEF
  95. monitor mww 0xB8001010 0x0000000c
  96. # LOAD IMAGE :
  97. #
  98. # Load the program executable called "u-boot"
  99. load test.elf
  100. # Load the symbols for the program.
  101. symbol-file test.elf
  102. # RUN TO MAIN :
  103. #
  104. # Set a breakpoint at main().
  105. #b reset
  106. b main
  107. # Run to the breakpoint.
  108. c