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  1. /***************************************************************************
  2. * Copyright (C) 2008 by Spencer Oliver *
  3. * spen@spen-soft.co.uk *
  4. * *
  5. * Copyright (C) 2008 by David T.L. Wong *
  6. * *
  7. * This program is free software; you can redistribute it and/or modify *
  8. * it under the terms of the GNU General Public License as published by *
  9. * the Free Software Foundation; either version 2 of the License, or *
  10. * (at your option) any later version. *
  11. * *
  12. * This program is distributed in the hope that it will be useful, *
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  15. * GNU General Public License for more details. *
  16. * *
  17. * You should have received a copy of the GNU General Public License *
  18. * along with this program; if not, write to the *
  19. * Free Software Foundation, Inc., *
  20. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  21. ***************************************************************************/
  22. #ifdef HAVE_CONFIG_H
  23. #include "config.h"
  24. #endif
  25. #include "mips32.h"
  26. #include "mips_ejtag.h"
  27. int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_me_and_submit_patch)
  28. {
  29. jtag_tap_t *tap;
  30. tap = ejtag_info->tap;
  31. if (tap==NULL)
  32. return ERROR_FAIL;
  33. if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (u32)new_instr)
  34. {
  35. scan_field_t field;
  36. u8 t[4];
  37. field.tap = tap;
  38. field.num_bits = tap->ir_length;
  39. field.out_value = t;
  40. buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
  41. field.in_value = NULL;
  42. jtag_add_ir_scan(1, &field, jtag_get_end_state());
  43. }
  44. return ERROR_OK;
  45. }
  46. int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
  47. {
  48. scan_field_t field;
  49. jtag_set_end_state(TAP_IDLE);
  50. mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE, NULL);
  51. field.tap = ejtag_info->tap;
  52. field.num_bits = 32;
  53. field.out_value = NULL;
  54. field.in_value = (void*)idcode;
  55. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  56. if (jtag_execute_queue() != ERROR_OK)
  57. {
  58. LOG_ERROR("register read failed");
  59. }
  60. return ERROR_OK;
  61. }
  62. int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
  63. {
  64. scan_field_t field;
  65. jtag_set_end_state(TAP_IDLE);
  66. mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE, NULL);
  67. field.tap = ejtag_info->tap;
  68. field.num_bits = 32;
  69. field.out_value = NULL;
  70. field.in_value = (void*)impcode;
  71. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  72. if (jtag_execute_queue() != ERROR_OK)
  73. {
  74. LOG_ERROR("register read failed");
  75. }
  76. return ERROR_OK;
  77. }
  78. int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
  79. {
  80. jtag_tap_t *tap;
  81. tap = ejtag_info->tap;
  82. if (tap==NULL)
  83. return ERROR_FAIL;
  84. scan_field_t field;
  85. u8 t[4];
  86. int retval;
  87. field.tap = tap;
  88. field.num_bits = 32;
  89. field.out_value = t;
  90. buf_set_u32(field.out_value, 0, field.num_bits, *data);
  91. field.in_value = (u8*)data;
  92. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  93. if ((retval = jtag_execute_queue()) != ERROR_OK)
  94. {
  95. LOG_ERROR("register read failed");
  96. return retval;
  97. }
  98. keep_alive();
  99. return ERROR_OK;
  100. }
  101. int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
  102. {
  103. u32 code[] = {
  104. MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
  105. MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
  106. MIPS32_ORI(1,1,0x0100), /* set SSt bit in debug reg */
  107. MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
  108. MIPS32_MFC0(1,31,0), /* move COP0 DeSave to $1 */
  109. MIPS32_NOP,
  110. MIPS32_B(NEG16(7)),
  111. MIPS32_NOP,
  112. };
  113. mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
  114. 0, NULL, 0, NULL, 1);
  115. return ERROR_OK;
  116. }
  117. int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
  118. {
  119. u32 code[] = {
  120. MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
  121. MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
  122. MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
  123. MIPS32_SW(1,0,15), /* sw $1,($15) */
  124. MIPS32_SW(2,0,15), /* sw $2,($15) */
  125. MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
  126. MIPS32_LUI(2,0xFFFF), /* $2 = 0xfffffeff */
  127. MIPS32_ORI(2,2,0xFEFF),
  128. MIPS32_AND(1,1,2),
  129. MIPS32_MTC0(1,23,0), /* move $1 to COP0 Debug */
  130. MIPS32_LW(2,0,15),
  131. MIPS32_LW(1,0,15),
  132. MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
  133. MIPS32_NOP,
  134. MIPS32_B(NEG16(15)),
  135. MIPS32_NOP,
  136. };
  137. mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
  138. 0, NULL, 0, NULL, 1);
  139. return ERROR_OK;
  140. }
  141. int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step)
  142. {
  143. if (enable_step)
  144. return mips_ejtag_step_enable(ejtag_info);
  145. return mips_ejtag_step_disable(ejtag_info);
  146. }
  147. int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
  148. {
  149. u32 ejtag_ctrl;
  150. jtag_set_end_state(TAP_IDLE);
  151. mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
  152. /* set debug break bit */
  153. ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
  154. mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
  155. /* break bit will be cleared by hardware */
  156. ejtag_ctrl = ejtag_info->ejtag_ctrl;
  157. mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
  158. LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
  159. if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
  160. LOG_DEBUG("Failed to enter Debug Mode!");
  161. return ERROR_OK;
  162. }
  163. int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info)
  164. {
  165. u32 inst;
  166. inst = MIPS32_DRET;
  167. /* execute our dret instruction */
  168. mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
  169. return ERROR_OK;
  170. }
  171. int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
  172. {
  173. /* read ejtag ECR */
  174. u32 code[] = {
  175. MIPS32_MTC0(15,31,0), /* move $15 to COP0 DeSave */
  176. MIPS32_LUI(15,UPPER16(MIPS32_PRACC_STACK)), /* $15 = MIPS32_PRACC_STACK */
  177. MIPS32_ORI(15,15,LOWER16(MIPS32_PRACC_STACK)),
  178. MIPS32_SW(1,0,15), /* sw $1,($15) */
  179. MIPS32_SW(2,0,15), /* sw $2,($15) */
  180. MIPS32_LUI(1,UPPER16(MIPS32_PRACC_PARAM_OUT)), /* $1 = MIPS32_PRACC_PARAM_OUT */
  181. MIPS32_ORI(1,1,LOWER16(MIPS32_PRACC_PARAM_OUT)),
  182. MIPS32_MFC0(2,23,0), /* move COP0 Debug to $2 */
  183. MIPS32_SW(2,0,1),
  184. MIPS32_LW(2,0,15),
  185. MIPS32_LW(1,0,15),
  186. MIPS32_MFC0(15,31,0), /* move COP0 DeSave to $15 */
  187. MIPS32_NOP,
  188. MIPS32_B(NEG16(14)),
  189. MIPS32_NOP,
  190. };
  191. mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
  192. 0, NULL, 1, debug_reg, 1);
  193. return ERROR_OK;
  194. }
  195. int mips_ejtag_init(mips_ejtag_t *ejtag_info)
  196. {
  197. u32 ejtag_version;
  198. mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
  199. LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
  200. /* get ejtag version */
  201. ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
  202. switch (ejtag_version)
  203. {
  204. case 0:
  205. LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
  206. break;
  207. case 1:
  208. LOG_DEBUG("EJTAG: Version 2.5 Detected");
  209. break;
  210. case 2:
  211. LOG_DEBUG("EJTAG: Version 2.6 Detected");
  212. break;
  213. case 3:
  214. LOG_DEBUG("EJTAG: Version 3.1 Detected");
  215. break;
  216. default:
  217. LOG_DEBUG("EJTAG: Unknown Version Detected");
  218. break;
  219. }
  220. LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
  221. ejtag_info->impcode & (1<<28) ? " R3k": " R4k",
  222. ejtag_info->impcode & (1<<24) ? " DINT": "",
  223. ejtag_info->impcode & (1<<22) ? " ASID_8": "",
  224. ejtag_info->impcode & (1<<21) ? " ASID_6": "",
  225. ejtag_info->impcode & (1<<16) ? " MIPS16": "",
  226. ejtag_info->impcode & (1<<14) ? " noDMA": " DMA",
  227. ejtag_info->impcode & (1<<0) ? " MIPS64": " MIPS32"
  228. );
  229. if((ejtag_info->impcode & (1<<14)) == 0)
  230. LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
  231. /* set initial state for ejtag control reg */
  232. ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
  233. return ERROR_OK;
  234. }