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  1. /***************************************************************************
  2. * Copyright (C) 2005 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * Copyright (C) 2008 by Spencer Oliver *
  6. * spen@spen-soft.co.uk *
  7. * *
  8. * This program is free software; you can redistribute it and/or modify *
  9. * it under the terms of the GNU General Public License as published by *
  10. * the Free Software Foundation; either version 2 of the License, or *
  11. * (at your option) any later version. *
  12. * *
  13. * This program is distributed in the hope that it will be useful, *
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  16. * GNU General Public License for more details. *
  17. * *
  18. * You should have received a copy of the GNU General Public License *
  19. * along with this program; if not, write to the *
  20. * Free Software Foundation, Inc., *
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  22. ***************************************************************************/
  23. #ifdef HAVE_CONFIG_H
  24. #include "config.h"
  25. #endif
  26. #include "str9xpec.h"
  27. #include "arm7_9_common.h"
  28. static int str9xpec_register_commands(struct command_context_s *cmd_ctx);
  29. static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
  30. static int str9xpec_erase(struct flash_bank_s *bank, int first, int last);
  31. static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last);
  32. static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count);
  33. static int str9xpec_probe(struct flash_bank_s *bank);
  34. static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  35. static int str9xpec_protect_check(struct flash_bank_s *bank);
  36. static int str9xpec_erase_check(struct flash_bank_s *bank);
  37. static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size);
  38. static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last);
  39. static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector);
  40. static int str9xpec_write_options(struct flash_bank_s *bank);
  41. static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  42. static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  43. static int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  44. static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  45. static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  46. static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  47. static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  48. static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  49. static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  50. static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
  51. flash_driver_t str9xpec_flash =
  52. {
  53. .name = "str9xpec",
  54. .register_commands = str9xpec_register_commands,
  55. .flash_bank_command = str9xpec_flash_bank_command,
  56. .erase = str9xpec_erase,
  57. .protect = str9xpec_protect,
  58. .write = str9xpec_write,
  59. .probe = str9xpec_probe,
  60. .auto_probe = str9xpec_probe,
  61. .erase_check = str9xpec_erase_check,
  62. .protect_check = str9xpec_protect_check,
  63. .info = str9xpec_info
  64. };
  65. static int str9xpec_register_commands(struct command_context_s *cmd_ctx)
  66. {
  67. command_t *str9xpec_cmd = register_command(cmd_ctx, NULL, "str9xpec", NULL, COMMAND_ANY, "str9xpec flash specific commands");
  68. register_command(cmd_ctx, str9xpec_cmd, "enable_turbo", str9xpec_handle_flash_enable_turbo_command, COMMAND_EXEC,
  69. "enable str9xpec turbo mode");
  70. register_command(cmd_ctx, str9xpec_cmd, "disable_turbo", str9xpec_handle_flash_disable_turbo_command, COMMAND_EXEC,
  71. "disable str9xpec turbo mode");
  72. register_command(cmd_ctx, str9xpec_cmd, "options_cmap", str9xpec_handle_flash_options_cmap_command, COMMAND_EXEC,
  73. "configure str9xpec boot sector");
  74. register_command(cmd_ctx, str9xpec_cmd, "options_lvdthd", str9xpec_handle_flash_options_lvdthd_command, COMMAND_EXEC,
  75. "configure str9xpec lvd threshold");
  76. register_command(cmd_ctx, str9xpec_cmd, "options_lvdsel", str9xpec_handle_flash_options_lvdsel_command, COMMAND_EXEC,
  77. "configure str9xpec lvd selection");
  78. register_command(cmd_ctx, str9xpec_cmd, "options_lvdwarn", str9xpec_handle_flash_options_lvdwarn_command, COMMAND_EXEC,
  79. "configure str9xpec lvd warning");
  80. register_command(cmd_ctx, str9xpec_cmd, "options_read", str9xpec_handle_flash_options_read_command, COMMAND_EXEC,
  81. "read str9xpec options");
  82. register_command(cmd_ctx, str9xpec_cmd, "options_write", str9xpec_handle_flash_options_write_command, COMMAND_EXEC,
  83. "write str9xpec options");
  84. register_command(cmd_ctx, str9xpec_cmd, "lock", str9xpec_handle_flash_lock_command, COMMAND_EXEC,
  85. "lock str9xpec device");
  86. register_command(cmd_ctx, str9xpec_cmd, "unlock", str9xpec_handle_flash_unlock_command, COMMAND_EXEC,
  87. "unlock str9xpec device");
  88. register_command(cmd_ctx, str9xpec_cmd, "part_id", str9xpec_handle_part_id_command, COMMAND_EXEC,
  89. "print part id of str9xpec flash bank <num>");
  90. return ERROR_OK;
  91. }
  92. int str9xpec_set_instr(jtag_tap_t *tap, uint32_t new_instr, tap_state_t end_state)
  93. {
  94. if ( tap == NULL ){
  95. return ERROR_TARGET_INVALID;
  96. }
  97. if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != new_instr)
  98. {
  99. scan_field_t field;
  100. field.tap = tap;
  101. field.num_bits = tap->ir_length;
  102. field.out_value = calloc(CEIL(field.num_bits, 8), 1);
  103. buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
  104. field.in_value = NULL;
  105. jtag_add_ir_scan(1, &field, end_state);
  106. free(field.out_value);
  107. }
  108. return ERROR_OK;
  109. }
  110. static uint8_t str9xpec_isc_status(jtag_tap_t *tap)
  111. {
  112. scan_field_t field;
  113. uint8_t status;
  114. if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
  115. return ISC_STATUS_ERROR;
  116. field.tap = tap;
  117. field.num_bits = 8;
  118. field.out_value = NULL;
  119. field.in_value = &status;
  120. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  121. jtag_execute_queue();
  122. LOG_DEBUG("status: 0x%2.2x", status);
  123. if (status & ISC_STATUS_SECURITY)
  124. LOG_INFO("Device Security Bit Set");
  125. return status;
  126. }
  127. static int str9xpec_isc_enable(struct flash_bank_s *bank)
  128. {
  129. uint8_t status;
  130. jtag_tap_t *tap;
  131. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  132. tap = str9xpec_info->tap;
  133. if (str9xpec_info->isc_enable)
  134. return ERROR_OK;
  135. /* enter isc mode */
  136. if (str9xpec_set_instr(tap, ISC_ENABLE, TAP_IDLE) != ERROR_OK)
  137. return ERROR_TARGET_INVALID;
  138. /* check ISC status */
  139. status = str9xpec_isc_status(tap);
  140. if (status & ISC_STATUS_MODE)
  141. {
  142. /* we have entered isc mode */
  143. str9xpec_info->isc_enable = 1;
  144. LOG_DEBUG("ISC_MODE Enabled");
  145. }
  146. return ERROR_OK;
  147. }
  148. static int str9xpec_isc_disable(struct flash_bank_s *bank)
  149. {
  150. uint8_t status;
  151. jtag_tap_t *tap;
  152. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  153. tap = str9xpec_info->tap;
  154. if (!str9xpec_info->isc_enable)
  155. return ERROR_OK;
  156. if (str9xpec_set_instr(tap, ISC_DISABLE, TAP_IDLE) != ERROR_OK)
  157. return ERROR_TARGET_INVALID;
  158. /* delay to handle aborts */
  159. jtag_add_sleep(50);
  160. /* check ISC status */
  161. status = str9xpec_isc_status(tap);
  162. if (!(status & ISC_STATUS_MODE))
  163. {
  164. /* we have left isc mode */
  165. str9xpec_info->isc_enable = 0;
  166. LOG_DEBUG("ISC_MODE Disabled");
  167. }
  168. return ERROR_OK;
  169. }
  170. static int str9xpec_read_config(struct flash_bank_s *bank)
  171. {
  172. scan_field_t field;
  173. uint8_t status;
  174. jtag_tap_t *tap;
  175. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  176. tap = str9xpec_info->tap;
  177. LOG_DEBUG("ISC_CONFIGURATION");
  178. /* execute ISC_CONFIGURATION command */
  179. str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
  180. field.tap = tap;
  181. field.num_bits = 64;
  182. field.out_value = NULL;
  183. field.in_value = str9xpec_info->options;
  184. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  185. jtag_execute_queue();
  186. status = str9xpec_isc_status(tap);
  187. return status;
  188. }
  189. static int str9xpec_build_block_list(struct flash_bank_s *bank)
  190. {
  191. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  192. int i;
  193. int num_sectors;
  194. int b0_sectors = 0, b1_sectors = 0;
  195. uint32_t offset = 0;
  196. int b1_size = 0x2000;
  197. switch (bank->size)
  198. {
  199. case (256 * 1024):
  200. b0_sectors = 4;
  201. break;
  202. case (512 * 1024):
  203. b0_sectors = 8;
  204. break;
  205. case (1024 * 1024):
  206. b0_sectors = 16;
  207. break;
  208. case (2048 * 1024):
  209. b0_sectors = 32;
  210. break;
  211. case (128 * 1024):
  212. b1_size = 0x4000;
  213. b1_sectors = 8;
  214. break;
  215. case (32 * 1024):
  216. b1_sectors = 4;
  217. break;
  218. default:
  219. LOG_ERROR("BUG: unknown bank->size encountered");
  220. exit(-1);
  221. }
  222. num_sectors = b0_sectors + b1_sectors;
  223. bank->num_sectors = num_sectors;
  224. bank->sectors = malloc(sizeof(flash_sector_t) * num_sectors);
  225. str9xpec_info->sector_bits = malloc(sizeof(uint32_t) * num_sectors);
  226. num_sectors = 0;
  227. for (i = 0; i < b0_sectors; i++)
  228. {
  229. bank->sectors[num_sectors].offset = offset;
  230. bank->sectors[num_sectors].size = 0x10000;
  231. offset += bank->sectors[i].size;
  232. bank->sectors[num_sectors].is_erased = -1;
  233. bank->sectors[num_sectors].is_protected = 1;
  234. str9xpec_info->sector_bits[num_sectors++] = i;
  235. }
  236. for (i = 0; i < b1_sectors; i++)
  237. {
  238. bank->sectors[num_sectors].offset = offset;
  239. bank->sectors[num_sectors].size = b1_size;
  240. offset += bank->sectors[i].size;
  241. bank->sectors[num_sectors].is_erased = -1;
  242. bank->sectors[num_sectors].is_protected = 1;
  243. str9xpec_info->sector_bits[num_sectors++] = i + 32;
  244. }
  245. return ERROR_OK;
  246. }
  247. /* flash bank str9x <base> <size> 0 0 <target#>
  248. */
  249. static int str9xpec_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
  250. {
  251. str9xpec_flash_controller_t *str9xpec_info;
  252. armv4_5_common_t *armv4_5 = NULL;
  253. arm7_9_common_t *arm7_9 = NULL;
  254. arm_jtag_t *jtag_info = NULL;
  255. if (argc < 6)
  256. {
  257. LOG_WARNING("incomplete flash_bank str9x configuration");
  258. return ERROR_FLASH_BANK_INVALID;
  259. }
  260. str9xpec_info = malloc(sizeof(str9xpec_flash_controller_t));
  261. bank->driver_priv = str9xpec_info;
  262. /* find out jtag position of flash controller
  263. * it is always after the arm966 core */
  264. armv4_5 = bank->target->arch_info;
  265. arm7_9 = armv4_5->arch_info;
  266. jtag_info = &arm7_9->jtag_info;
  267. str9xpec_info->tap = jtag_tap_by_position( jtag_info->tap->abs_chain_position - 1);
  268. str9xpec_info->isc_enable = 0;
  269. str9xpec_build_block_list(bank);
  270. /* clear option byte register */
  271. buf_set_u32(str9xpec_info->options, 0, 64, 0);
  272. return ERROR_OK;
  273. }
  274. static int str9xpec_blank_check(struct flash_bank_s *bank, int first, int last)
  275. {
  276. scan_field_t field;
  277. uint8_t status;
  278. jtag_tap_t *tap;
  279. int i;
  280. uint8_t *buffer = NULL;
  281. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  282. tap = str9xpec_info->tap;
  283. if (!str9xpec_info->isc_enable) {
  284. str9xpec_isc_enable( bank );
  285. }
  286. if (!str9xpec_info->isc_enable) {
  287. return ERROR_FLASH_OPERATION_FAILED;
  288. }
  289. buffer = calloc(CEIL(64, 8), 1);
  290. LOG_DEBUG("blank check: first_bank: %i, last_bank: %i", first, last);
  291. for (i = first; i <= last; i++) {
  292. buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
  293. }
  294. /* execute ISC_BLANK_CHECK command */
  295. str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
  296. field.tap = tap;
  297. field.num_bits = 64;
  298. field.out_value = buffer;
  299. field.in_value = NULL;
  300. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  301. jtag_add_sleep(40000);
  302. /* read blank check result */
  303. field.tap = tap;
  304. field.num_bits = 64;
  305. field.out_value = NULL;
  306. field.in_value = buffer;
  307. jtag_add_dr_scan(1, &field, TAP_IRPAUSE);
  308. jtag_execute_queue();
  309. status = str9xpec_isc_status(tap);
  310. for (i = first; i <= last; i++)
  311. {
  312. if (buf_get_u32(buffer, str9xpec_info->sector_bits[i], 1))
  313. bank->sectors[i].is_erased = 0;
  314. else
  315. bank->sectors[i].is_erased = 1;
  316. }
  317. free(buffer);
  318. str9xpec_isc_disable(bank);
  319. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  320. return ERROR_FLASH_OPERATION_FAILED;
  321. return ERROR_OK;
  322. }
  323. static int str9xpec_protect_check(struct flash_bank_s *bank)
  324. {
  325. uint8_t status;
  326. int i;
  327. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  328. status = str9xpec_read_config(bank);
  329. for (i = 0; i < bank->num_sectors; i++)
  330. {
  331. if (buf_get_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1))
  332. bank->sectors[i].is_protected = 1;
  333. else
  334. bank->sectors[i].is_protected = 0;
  335. }
  336. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  337. return ERROR_FLASH_OPERATION_FAILED;
  338. return ERROR_OK;
  339. }
  340. static int str9xpec_erase_area(struct flash_bank_s *bank, int first, int last)
  341. {
  342. scan_field_t field;
  343. uint8_t status;
  344. jtag_tap_t *tap;
  345. int i;
  346. uint8_t *buffer = NULL;
  347. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  348. tap = str9xpec_info->tap;
  349. if (!str9xpec_info->isc_enable) {
  350. str9xpec_isc_enable( bank );
  351. }
  352. if (!str9xpec_info->isc_enable) {
  353. return ISC_STATUS_ERROR;
  354. }
  355. buffer = calloc(CEIL(64, 8), 1);
  356. LOG_DEBUG("erase: first_bank: %i, last_bank: %i", first, last);
  357. /* last bank: 0xFF signals a full erase (unlock complete device) */
  358. /* last bank: 0xFE signals a option byte erase */
  359. if (last == 0xFF)
  360. {
  361. for (i = 0; i < 64; i++) {
  362. buf_set_u32(buffer, i, 1, 1);
  363. }
  364. }
  365. else if (last == 0xFE)
  366. {
  367. buf_set_u32(buffer, 49, 1, 1);
  368. }
  369. else
  370. {
  371. for (i = first; i <= last; i++) {
  372. buf_set_u32(buffer, str9xpec_info->sector_bits[i], 1, 1);
  373. }
  374. }
  375. LOG_DEBUG("ISC_ERASE");
  376. /* execute ISC_ERASE command */
  377. str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
  378. field.tap = tap;
  379. field.num_bits = 64;
  380. field.out_value = buffer;
  381. field.in_value = NULL;
  382. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  383. jtag_execute_queue();
  384. jtag_add_sleep(10);
  385. /* wait for erase completion */
  386. while (!((status = str9xpec_isc_status(tap)) & ISC_STATUS_BUSY)) {
  387. alive_sleep(1);
  388. }
  389. free(buffer);
  390. str9xpec_isc_disable(bank);
  391. return status;
  392. }
  393. static int str9xpec_erase(struct flash_bank_s *bank, int first, int last)
  394. {
  395. int status;
  396. status = str9xpec_erase_area(bank, first, last);
  397. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  398. return ERROR_FLASH_OPERATION_FAILED;
  399. return ERROR_OK;
  400. }
  401. static int str9xpec_lock_device(struct flash_bank_s *bank)
  402. {
  403. scan_field_t field;
  404. uint8_t status;
  405. jtag_tap_t *tap;
  406. str9xpec_flash_controller_t *str9xpec_info = NULL;
  407. str9xpec_info = bank->driver_priv;
  408. tap = str9xpec_info->tap;
  409. if (!str9xpec_info->isc_enable) {
  410. str9xpec_isc_enable( bank );
  411. }
  412. if (!str9xpec_info->isc_enable) {
  413. return ISC_STATUS_ERROR;
  414. }
  415. /* set security address */
  416. str9xpec_set_address(bank, 0x80);
  417. /* execute ISC_PROGRAM command */
  418. str9xpec_set_instr(tap, ISC_PROGRAM_SECURITY, TAP_IDLE);
  419. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  420. do {
  421. field.tap = tap;
  422. field.num_bits = 8;
  423. field.out_value = NULL;
  424. field.in_value = &status;
  425. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  426. jtag_execute_queue();
  427. } while(!(status & ISC_STATUS_BUSY));
  428. str9xpec_isc_disable(bank);
  429. return status;
  430. }
  431. static int str9xpec_unlock_device(struct flash_bank_s *bank)
  432. {
  433. uint8_t status;
  434. status = str9xpec_erase_area(bank, 0, 255);
  435. return status;
  436. }
  437. static int str9xpec_protect(struct flash_bank_s *bank, int set, int first, int last)
  438. {
  439. uint8_t status;
  440. int i;
  441. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  442. status = str9xpec_read_config(bank);
  443. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  444. return ERROR_FLASH_OPERATION_FAILED;
  445. LOG_DEBUG("protect: first_bank: %i, last_bank: %i", first, last);
  446. /* last bank: 0xFF signals a full device protect */
  447. if (last == 0xFF)
  448. {
  449. if ( set )
  450. {
  451. status = str9xpec_lock_device(bank);
  452. }
  453. else
  454. {
  455. /* perform full erase to unlock device */
  456. status = str9xpec_unlock_device(bank);
  457. }
  458. }
  459. else
  460. {
  461. for (i = first; i <= last; i++)
  462. {
  463. if ( set )
  464. buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 1);
  465. else
  466. buf_set_u32(str9xpec_info->options, str9xpec_info->sector_bits[i], 1, 0);
  467. }
  468. status = str9xpec_write_options(bank);
  469. }
  470. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  471. return ERROR_FLASH_OPERATION_FAILED;
  472. return ERROR_OK;
  473. }
  474. static int str9xpec_set_address(struct flash_bank_s *bank, uint8_t sector)
  475. {
  476. jtag_tap_t *tap;
  477. scan_field_t field;
  478. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  479. tap = str9xpec_info->tap;
  480. /* set flash controller address */
  481. str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
  482. field.tap = tap;
  483. field.num_bits = 8;
  484. field.out_value = &sector;
  485. field.in_value = NULL;
  486. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  487. return ERROR_OK;
  488. }
  489. static int str9xpec_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
  490. {
  491. str9xpec_flash_controller_t *str9xpec_info = bank->driver_priv;
  492. uint32_t dwords_remaining = (count / 8);
  493. uint32_t bytes_remaining = (count & 0x00000007);
  494. uint32_t bytes_written = 0;
  495. uint8_t status;
  496. uint32_t check_address = offset;
  497. jtag_tap_t *tap;
  498. scan_field_t field;
  499. uint8_t *scanbuf;
  500. int i;
  501. int first_sector = 0;
  502. int last_sector = 0;
  503. tap = str9xpec_info->tap;
  504. if (!str9xpec_info->isc_enable) {
  505. str9xpec_isc_enable(bank);
  506. }
  507. if (!str9xpec_info->isc_enable) {
  508. return ERROR_FLASH_OPERATION_FAILED;
  509. }
  510. if (offset & 0x7)
  511. {
  512. LOG_WARNING("offset 0x%" PRIx32 " breaks required 8-byte alignment", offset);
  513. return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
  514. }
  515. for (i = 0; i < bank->num_sectors; i++)
  516. {
  517. uint32_t sec_start = bank->sectors[i].offset;
  518. uint32_t sec_end = sec_start + bank->sectors[i].size;
  519. /* check if destination falls within the current sector */
  520. if ((check_address >= sec_start) && (check_address < sec_end))
  521. {
  522. /* check if destination ends in the current sector */
  523. if (offset + count < sec_end)
  524. check_address = offset + count;
  525. else
  526. check_address = sec_end;
  527. }
  528. if ((offset >= sec_start) && (offset < sec_end)){
  529. first_sector = i;
  530. }
  531. if ((offset + count >= sec_start) && (offset + count < sec_end)){
  532. last_sector = i;
  533. }
  534. }
  535. if (check_address != offset + count)
  536. return ERROR_FLASH_DST_OUT_OF_BANK;
  537. LOG_DEBUG("first_sector: %i, last_sector: %i", first_sector, last_sector);
  538. scanbuf = calloc(CEIL(64, 8), 1);
  539. LOG_DEBUG("ISC_PROGRAM");
  540. for (i = first_sector; i <= last_sector; i++)
  541. {
  542. str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
  543. dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);
  544. while (dwords_remaining > 0)
  545. {
  546. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  547. field.tap = tap;
  548. field.num_bits = 64;
  549. field.out_value = (buffer + bytes_written);
  550. field.in_value = NULL;
  551. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  552. /* small delay before polling */
  553. jtag_add_sleep(50);
  554. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  555. do {
  556. field.tap = tap;
  557. field.num_bits = 8;
  558. field.out_value = NULL;
  559. field.in_value = scanbuf;
  560. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  561. jtag_execute_queue();
  562. status = buf_get_u32(scanbuf, 0, 8);
  563. } while(!(status & ISC_STATUS_BUSY));
  564. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  565. return ERROR_FLASH_OPERATION_FAILED;
  566. /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
  567. return ERROR_FLASH_OPERATION_FAILED; */
  568. dwords_remaining--;
  569. bytes_written += 8;
  570. }
  571. }
  572. if (bytes_remaining)
  573. {
  574. uint8_t last_dword[8] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  575. int i = 0;
  576. while(bytes_remaining > 0)
  577. {
  578. last_dword[i++] = *(buffer + bytes_written);
  579. bytes_remaining--;
  580. bytes_written++;
  581. }
  582. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  583. field.tap = tap;
  584. field.num_bits = 64;
  585. field.out_value = last_dword;
  586. field.in_value = NULL;
  587. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  588. /* small delay before polling */
  589. jtag_add_sleep(50);
  590. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  591. do {
  592. field.tap = tap;
  593. field.num_bits = 8;
  594. field.out_value = NULL;
  595. field.in_value = scanbuf;
  596. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  597. jtag_execute_queue();
  598. status = buf_get_u32(scanbuf, 0, 8);
  599. } while(!(status & ISC_STATUS_BUSY));
  600. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  601. return ERROR_FLASH_OPERATION_FAILED;
  602. /* if ((status & ISC_STATUS_INT_ERROR) != STR9XPEC_ISC_INTFAIL)
  603. return ERROR_FLASH_OPERATION_FAILED; */
  604. }
  605. free(scanbuf);
  606. str9xpec_isc_disable(bank);
  607. return ERROR_OK;
  608. }
  609. static int str9xpec_probe(struct flash_bank_s *bank)
  610. {
  611. return ERROR_OK;
  612. }
  613. static int str9xpec_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  614. {
  615. flash_bank_t *bank;
  616. scan_field_t field;
  617. uint8_t *buffer = NULL;
  618. jtag_tap_t *tap;
  619. uint32_t idcode;
  620. str9xpec_flash_controller_t *str9xpec_info = NULL;
  621. if (argc < 1)
  622. {
  623. return ERROR_COMMAND_SYNTAX_ERROR;
  624. }
  625. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  626. if (!bank)
  627. {
  628. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  629. return ERROR_OK;
  630. }
  631. str9xpec_info = bank->driver_priv;
  632. tap = str9xpec_info->tap;
  633. buffer = calloc(CEIL(32, 8), 1);
  634. str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
  635. field.tap = tap;
  636. field.num_bits = 32;
  637. field.out_value = NULL;
  638. field.in_value = buffer;
  639. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  640. jtag_execute_queue();
  641. idcode = buf_get_u32(buffer, 0, 32);
  642. command_print(cmd_ctx, "str9xpec part id: 0x%8.8" PRIx32 "", idcode);
  643. free(buffer);
  644. return ERROR_OK;
  645. }
  646. static int str9xpec_erase_check(struct flash_bank_s *bank)
  647. {
  648. return str9xpec_blank_check(bank, 0, bank->num_sectors - 1);
  649. }
  650. static int str9xpec_info(struct flash_bank_s *bank, char *buf, int buf_size)
  651. {
  652. snprintf(buf, buf_size, "str9xpec flash driver info" );
  653. return ERROR_OK;
  654. }
  655. static int str9xpec_handle_flash_options_read_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  656. {
  657. flash_bank_t *bank;
  658. uint8_t status;
  659. str9xpec_flash_controller_t *str9xpec_info = NULL;
  660. if (argc < 1)
  661. {
  662. command_print(cmd_ctx, "str9xpec options_read <bank>");
  663. return ERROR_OK;
  664. }
  665. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  666. if (!bank)
  667. {
  668. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  669. return ERROR_OK;
  670. }
  671. str9xpec_info = bank->driver_priv;
  672. status = str9xpec_read_config(bank);
  673. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  674. return ERROR_FLASH_OPERATION_FAILED;
  675. /* boot bank */
  676. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1))
  677. command_print(cmd_ctx, "CS Map: bank1");
  678. else
  679. command_print(cmd_ctx, "CS Map: bank0");
  680. /* OTP lock */
  681. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_OTPBIT, 1))
  682. command_print(cmd_ctx, "OTP Lock: OTP Locked");
  683. else
  684. command_print(cmd_ctx, "OTP Lock: OTP Unlocked");
  685. /* LVD Threshold */
  686. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1))
  687. command_print(cmd_ctx, "LVD Threshold: 2.7v");
  688. else
  689. command_print(cmd_ctx, "LVD Threshold: 2.4v");
  690. /* LVD reset warning */
  691. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1))
  692. command_print(cmd_ctx, "LVD Reset Warning: VDD or VDDQ Inputs");
  693. else
  694. command_print(cmd_ctx, "LVD Reset Warning: VDD Input Only");
  695. /* LVD reset select */
  696. if (buf_get_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1))
  697. command_print(cmd_ctx, "LVD Reset Selection: VDD or VDDQ Inputs");
  698. else
  699. command_print(cmd_ctx, "LVD Reset Selection: VDD Input Only");
  700. return ERROR_OK;
  701. }
  702. static int str9xpec_write_options(struct flash_bank_s *bank)
  703. {
  704. scan_field_t field;
  705. uint8_t status;
  706. jtag_tap_t *tap;
  707. str9xpec_flash_controller_t *str9xpec_info = NULL;
  708. str9xpec_info = bank->driver_priv;
  709. tap = str9xpec_info->tap;
  710. /* erase config options first */
  711. status = str9xpec_erase_area( bank, 0xFE, 0xFE );
  712. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  713. return status;
  714. if (!str9xpec_info->isc_enable) {
  715. str9xpec_isc_enable( bank );
  716. }
  717. if (!str9xpec_info->isc_enable) {
  718. return ISC_STATUS_ERROR;
  719. }
  720. /* according to data 64th bit has to be set */
  721. buf_set_u32(str9xpec_info->options, 63, 1, 1);
  722. /* set option byte address */
  723. str9xpec_set_address(bank, 0x50);
  724. /* execute ISC_PROGRAM command */
  725. str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
  726. field.tap = tap;
  727. field.num_bits = 64;
  728. field.out_value = str9xpec_info->options;
  729. field.in_value = NULL;
  730. jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
  731. /* small delay before polling */
  732. jtag_add_sleep(50);
  733. str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
  734. do {
  735. field.tap = tap;
  736. field.num_bits = 8;
  737. field.out_value = NULL;
  738. field.in_value = &status;
  739. jtag_add_dr_scan(1, &field, jtag_get_end_state());
  740. jtag_execute_queue();
  741. } while(!(status & ISC_STATUS_BUSY));
  742. str9xpec_isc_disable(bank);
  743. return status;
  744. }
  745. static int str9xpec_handle_flash_options_write_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  746. {
  747. flash_bank_t *bank;
  748. uint8_t status;
  749. if (argc < 1)
  750. {
  751. command_print(cmd_ctx, "str9xpec options_write <bank>");
  752. return ERROR_OK;
  753. }
  754. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  755. if (!bank)
  756. {
  757. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  758. return ERROR_OK;
  759. }
  760. status = str9xpec_write_options(bank);
  761. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  762. return ERROR_FLASH_OPERATION_FAILED;
  763. return ERROR_OK;
  764. }
  765. static int str9xpec_handle_flash_options_cmap_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  766. {
  767. flash_bank_t *bank;
  768. str9xpec_flash_controller_t *str9xpec_info = NULL;
  769. if (argc < 2)
  770. {
  771. command_print(cmd_ctx, "str9xpec options_cmap <bank> <bank0|bank1>");
  772. return ERROR_OK;
  773. }
  774. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  775. if (!bank)
  776. {
  777. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  778. return ERROR_OK;
  779. }
  780. str9xpec_info = bank->driver_priv;
  781. if (strcmp(args[1], "bank1") == 0)
  782. {
  783. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 1);
  784. }
  785. else
  786. {
  787. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_CSMAPBIT, 1, 0);
  788. }
  789. return ERROR_OK;
  790. }
  791. static int str9xpec_handle_flash_options_lvdthd_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  792. {
  793. flash_bank_t *bank;
  794. str9xpec_flash_controller_t *str9xpec_info = NULL;
  795. if (argc < 2)
  796. {
  797. command_print(cmd_ctx, "str9xpec options_lvdthd <bank> <2.4v|2.7v>");
  798. return ERROR_OK;
  799. }
  800. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  801. if (!bank)
  802. {
  803. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  804. return ERROR_OK;
  805. }
  806. str9xpec_info = bank->driver_priv;
  807. if (strcmp(args[1], "2.7v") == 0)
  808. {
  809. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 1);
  810. }
  811. else
  812. {
  813. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDTHRESBIT, 1, 0);
  814. }
  815. return ERROR_OK;
  816. }
  817. int str9xpec_handle_flash_options_lvdsel_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  818. {
  819. flash_bank_t *bank;
  820. str9xpec_flash_controller_t *str9xpec_info = NULL;
  821. if (argc < 2)
  822. {
  823. command_print(cmd_ctx, "str9xpec options_lvdsel <bank> <vdd|vdd_vddq>");
  824. return ERROR_OK;
  825. }
  826. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  827. if (!bank)
  828. {
  829. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  830. return ERROR_OK;
  831. }
  832. str9xpec_info = bank->driver_priv;
  833. if (strcmp(args[1], "vdd_vddq") == 0)
  834. {
  835. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 1);
  836. }
  837. else
  838. {
  839. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDSELBIT, 1, 0);
  840. }
  841. return ERROR_OK;
  842. }
  843. static int str9xpec_handle_flash_options_lvdwarn_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  844. {
  845. flash_bank_t *bank;
  846. str9xpec_flash_controller_t *str9xpec_info = NULL;
  847. if (argc < 2)
  848. {
  849. command_print(cmd_ctx, "str9xpec options_lvdwarn <bank> <vdd|vdd_vddq>");
  850. return ERROR_OK;
  851. }
  852. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  853. if (!bank)
  854. {
  855. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  856. return ERROR_OK;
  857. }
  858. str9xpec_info = bank->driver_priv;
  859. if (strcmp(args[1], "vdd_vddq") == 0)
  860. {
  861. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 1);
  862. }
  863. else
  864. {
  865. buf_set_u32(str9xpec_info->options, STR9XPEC_OPT_LVDWARNBIT, 1, 0);
  866. }
  867. return ERROR_OK;
  868. }
  869. static int str9xpec_handle_flash_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  870. {
  871. uint8_t status;
  872. flash_bank_t *bank;
  873. if (argc < 1)
  874. {
  875. command_print(cmd_ctx, "str9xpec lock <bank>");
  876. return ERROR_OK;
  877. }
  878. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  879. if (!bank)
  880. {
  881. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  882. return ERROR_OK;
  883. }
  884. status = str9xpec_lock_device(bank);
  885. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  886. return ERROR_FLASH_OPERATION_FAILED;
  887. return ERROR_OK;
  888. }
  889. static int str9xpec_handle_flash_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  890. {
  891. uint8_t status;
  892. flash_bank_t *bank;
  893. if (argc < 1)
  894. {
  895. command_print(cmd_ctx, "str9xpec unlock <bank>");
  896. return ERROR_OK;
  897. }
  898. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  899. if (!bank)
  900. {
  901. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  902. return ERROR_OK;
  903. }
  904. status = str9xpec_unlock_device(bank);
  905. if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
  906. return ERROR_FLASH_OPERATION_FAILED;
  907. return ERROR_OK;
  908. }
  909. static int str9xpec_handle_flash_enable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  910. {
  911. int retval;
  912. flash_bank_t *bank;
  913. jtag_tap_t *tap0;
  914. jtag_tap_t *tap1;
  915. jtag_tap_t *tap2;
  916. str9xpec_flash_controller_t *str9xpec_info = NULL;
  917. if (argc < 1)
  918. {
  919. command_print(cmd_ctx, "str9xpec enable_turbo <bank>");
  920. return ERROR_OK;
  921. }
  922. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  923. if (!bank)
  924. {
  925. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  926. return ERROR_OK;
  927. }
  928. str9xpec_info = bank->driver_priv;
  929. tap0 = str9xpec_info->tap;
  930. /* remove arm core from chain - enter turbo mode */
  931. tap1 = tap0->next_tap;
  932. if (tap1 == NULL)
  933. {
  934. /* things are *WRONG* */
  935. command_print(cmd_ctx,"**STR9FLASH** (tap1) invalid chain?");
  936. return ERROR_OK;
  937. }
  938. tap2 = tap1->next_tap;
  939. if (tap2 == NULL)
  940. {
  941. /* things are *WRONG* */
  942. command_print(cmd_ctx,"**STR9FLASH** (tap2) invalid chain?");
  943. return ERROR_OK;
  944. }
  945. /* enable turbo mode - TURBO-PROG-ENABLE */
  946. str9xpec_set_instr(tap2, 0xD, TAP_IDLE);
  947. if ((retval = jtag_execute_queue()) != ERROR_OK)
  948. return retval;
  949. /* modify scan chain - str9 core has been removed */
  950. tap1->enabled = 0;
  951. return ERROR_OK;
  952. }
  953. static int str9xpec_handle_flash_disable_turbo_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
  954. {
  955. flash_bank_t *bank;
  956. jtag_tap_t *tap;
  957. str9xpec_flash_controller_t *str9xpec_info = NULL;
  958. if (argc < 1)
  959. {
  960. command_print(cmd_ctx, "str9xpec disable_turbo <bank>");
  961. return ERROR_OK;
  962. }
  963. bank = get_flash_bank_by_num(strtoul(args[0], NULL, 0));
  964. if (!bank)
  965. {
  966. command_print(cmd_ctx, "flash bank '#%s' is out of bounds", args[0]);
  967. return ERROR_OK;
  968. }
  969. str9xpec_info = bank->driver_priv;
  970. tap = str9xpec_info->tap;
  971. if (tap == NULL)
  972. return ERROR_FAIL;
  973. /* exit turbo mode via RESET */
  974. str9xpec_set_instr(tap, ISC_NOOP, TAP_RESET);
  975. jtag_execute_queue();
  976. /* restore previous scan chain */
  977. if (tap->next_tap) {
  978. tap->next_tap->enabled = 1;
  979. }
  980. return ERROR_OK;
  981. }