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69 lines
1.8 KiB

  1. # imx31 config
  2. #
  3. reset_config trst_and_srst srst_gates_jtag
  4. adapter_nsrst_delay 5
  5. if { [info exists CHIPNAME] } {
  6. set _CHIPNAME $CHIPNAME
  7. } else {
  8. set _CHIPNAME imx31
  9. }
  10. if { [info exists ENDIAN] } {
  11. set _ENDIAN $ENDIAN
  12. } else {
  13. set _ENDIAN little
  14. }
  15. if { [info exists CPUTAPID ] } {
  16. set _CPUTAPID $CPUTAPID
  17. } else {
  18. set _CPUTAPID 0x07b3601d
  19. }
  20. if { [info exists SDMATAPID ] } {
  21. set _SDMATAPID $SDMATAPID
  22. } else {
  23. set _SDMATAPID 0x2190101d
  24. }
  25. if { [info exists ETBTAPID ] } {
  26. set _ETBTAPID $ETBTAPID
  27. } else {
  28. set _ETBTAPID 0x2b900f0f
  29. }
  30. #========================================
  31. jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
  32. # The "SDMA" - <S>mart <DMA> controller debug tap
  33. # Based on some IO pins - this can be disabled & removed
  34. # See diagram: 6-14
  35. # SIGNAL NAME:
  36. # SJC_MOD - controls multiplexer - disables ARM1136
  37. # SDMA_BYPASS - disables SDMA -
  38. #
  39. # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
  40. jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
  41. # No IDCODE for this TAP
  42. jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected-id 0x0
  43. # Per section 40.17.1, table 40-85 the IR register is 4 bits
  44. # But this conflicts with Diagram 6-13, "3bits ir and drs"
  45. jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
  46. set _TARGETNAME $_CHIPNAME.cpu
  47. target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
  48. proc power_restore {} { echo "Sensed power restore. No action." }
  49. proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." }
  50. # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode
  51. etm config $_TARGETNAME 16 normal full etb
  52. etb config $_TARGETNAME $_CHIPNAME.etb