You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
 
 
 
 
 
 

130 lines
4.4 KiB

  1. /***************************************************************************
  2. * Copyright (C) 2005, 2006 by Dominic Rath *
  3. * Dominic.Rath@gmx.de *
  4. * *
  5. * Copyright (C) 2007,2008 √ėyvind Harboe *
  6. * oyvind.harboe@zylin.com *
  7. * *
  8. * Copyright (C) 2008 by Spencer Oliver *
  9. * spen@spen-soft.co.uk *
  10. * *
  11. * This program is free software; you can redistribute it and/or modify *
  12. * it under the terms of the GNU General Public License as published by *
  13. * the Free Software Foundation; either version 2 of the License, or *
  14. * (at your option) any later version. *
  15. * *
  16. * This program is distributed in the hope that it will be useful, *
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  19. * GNU General Public License for more details. *
  20. * *
  21. * You should have received a copy of the GNU General Public License *
  22. * along with this program; if not, write to the *
  23. * Free Software Foundation, Inc., *
  24. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
  25. ***************************************************************************/
  26. #ifndef EMBEDDED_ICE_H
  27. #define EMBEDDED_ICE_H
  28. #include "arm7_9_common.h"
  29. enum
  30. {
  31. EICE_DBG_CTRL = 0,
  32. EICE_DBG_STAT = 1,
  33. EICE_COMMS_CTRL = 2,
  34. EICE_COMMS_DATA = 3,
  35. EICE_W0_ADDR_VALUE = 4,
  36. EICE_W0_ADDR_MASK = 5,
  37. EICE_W0_DATA_VALUE = 6,
  38. EICE_W0_DATA_MASK = 7,
  39. EICE_W0_CONTROL_VALUE = 8,
  40. EICE_W0_CONTROL_MASK = 9,
  41. EICE_W1_ADDR_VALUE = 10,
  42. EICE_W1_ADDR_MASK = 11,
  43. EICE_W1_DATA_VALUE = 12,
  44. EICE_W1_DATA_MASK = 13,
  45. EICE_W1_CONTROL_VALUE = 14,
  46. EICE_W1_CONTROL_MASK = 15,
  47. EICE_VEC_CATCH = 16
  48. };
  49. enum
  50. {
  51. EICE_DBG_CONTROL_ICEDIS = 5,
  52. EICE_DBG_CONTROL_MONEN = 4,
  53. EICE_DBG_CONTROL_INTDIS = 2,
  54. EICE_DBG_CONTROL_DBGRQ = 1,
  55. EICE_DBG_CONTROL_DBGACK = 0,
  56. };
  57. enum
  58. {
  59. EICE_DBG_STATUS_IJBIT = 5,
  60. EICE_DBG_STATUS_ITBIT = 4,
  61. EICE_DBG_STATUS_SYSCOMP = 3,
  62. EICE_DBG_STATUS_IFEN = 2,
  63. EICE_DBG_STATUS_DBGRQ = 1,
  64. EICE_DBG_STATUS_DBGACK = 0
  65. };
  66. enum
  67. {
  68. EICE_W_CTRL_ENABLE = 0x100,
  69. EICE_W_CTRL_RANGE = 0x80,
  70. EICE_W_CTRL_CHAIN = 0x40,
  71. EICE_W_CTRL_EXTERN = 0x20,
  72. EICE_W_CTRL_nTRANS = 0x10,
  73. EICE_W_CTRL_nOPC = 0x8,
  74. EICE_W_CTRL_MAS = 0x6,
  75. EICE_W_CTRL_ITBIT = 0x2,
  76. EICE_W_CTRL_nRW = 0x1
  77. };
  78. enum
  79. {
  80. EICE_COMM_CTRL_WBIT = 1,
  81. EICE_COMM_CTRL_RBIT = 0
  82. };
  83. typedef struct embeddedice_reg_s
  84. {
  85. int addr;
  86. arm_jtag_t *jtag_info;
  87. } embeddedice_reg_t;
  88. extern reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7_9);
  89. extern int embeddedice_setup(target_t *target);
  90. extern int embeddedice_read_reg(reg_t *reg);
  91. extern void embeddedice_write_reg(reg_t *reg, u32 value);
  92. extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
  93. extern void embeddedice_store_reg(reg_t *reg);
  94. extern void embeddedice_set_reg(reg_t *reg, u32 value);
  95. extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
  96. extern int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size);
  97. extern int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size);
  98. extern int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout);
  99. /* If many embeddedice_write_reg() follow eachother, then the >1 invocations can be this faster version of
  100. * embeddedice_write_reg
  101. */
  102. static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_addr, u32 value)
  103. {
  104. static const int embeddedice_num_bits[]={32,5,1};
  105. u32 values[3];
  106. values[0]=value;
  107. values[1]=reg_addr;
  108. values[2]=1;
  109. jtag_add_dr_out( tap,
  110. 3,
  111. embeddedice_num_bits,
  112. values,
  113. jtag_get_end_state());
  114. }
  115. void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
  116. #endif /* EMBEDDED_ICE_H */