|
|
@@ -17,15 +17,14 @@ uint16_t send_adc, send_dac; |
|
|
|
/* A "step" in the DAC output at the resolution we want. */ |
|
|
|
#define DAC_STEP 0x0004 |
|
|
|
|
|
|
|
/* One DAC "step" is this many counts on ADC input */ |
|
|
|
#define ADC_DAC_SCALING (1.0 / 84.935) |
|
|
|
/* 1-bit change at DAC changes the ADC count by this much */ |
|
|
|
#define ADC_DAC_SCALING (21.234) |
|
|
|
|
|
|
|
uint16_t dac_cmd = ((uint32_t)DAC_MAX + DAC_MIN) / 2; |
|
|
|
|
|
|
|
/* 128 KHz, after each ADC sample */ |
|
|
|
void fast_callback(void) |
|
|
|
{ |
|
|
|
|
|
|
|
} |
|
|
|
|
|
|
|
/* 8 KHz, after DMA buffer filled */ |
|
|
@@ -44,7 +43,7 @@ void slow_callback(void) |
|
|
|
/* Update DAC. Add whatever is necessary to cause the ADC |
|
|
|
to recenter at 0x0800 */ |
|
|
|
{ |
|
|
|
int32_t adjustment = ((int32_t) v - 0x0800) * ADC_DAC_SCALING; |
|
|
|
int32_t adjustment = ((int32_t) v - 0x0800) / ADC_DAC_SCALING; |
|
|
|
int32_t newdac = dac_cmd + adjustment; |
|
|
|
if (adjustment) { |
|
|
|
if (newdac < DAC_MIN) |
|
|
@@ -72,6 +71,11 @@ void slow_callback(void) |
|
|
|
#endif |
|
|
|
} |
|
|
|
|
|
|
|
void debug_callback(void) |
|
|
|
{ |
|
|
|
send_adc = adc_dmabuf[adc_offset]; |
|
|
|
} |
|
|
|
|
|
|
|
void send_to_pc(void) |
|
|
|
{ |
|
|
|
/* Sent data format: |
|
|
@@ -88,6 +92,7 @@ void send_to_pc(void) |
|
|
|
int main(void) |
|
|
|
{ |
|
|
|
int debug = 0; |
|
|
|
int i; |
|
|
|
|
|
|
|
config_init(); |
|
|
|
adcext_init(); |
|
|
@@ -96,11 +101,14 @@ int main(void) |
|
|
|
|
|
|
|
if (debug) { |
|
|
|
uart1_init(115200); |
|
|
|
adc_dma_callback = debug_callback; |
|
|
|
|
|
|
|
uint16_t dac = 32768; |
|
|
|
while (1) { |
|
|
|
dac_write(dac); |
|
|
|
uart1_put_dec(dac); |
|
|
|
uart1_put(' '); |
|
|
|
uart1_put_dec(send_adc); |
|
|
|
uart1_crlf(); |
|
|
|
switch (uart1_get()) { |
|
|
|
case '[': |
|
|
|